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| never stop thinking. data sheet, rev. 1.02, nov. 2005 communications ninja c/cx (adm6992c/cx) two port bridge fiber to fast ethernet converter
edition 2005-11-25 published by infineon technologies ag, st.-martin-strasse 53, 81669 mnchen, germany ? infineon technologies ag 2005. all rights reserved. attention please! the information herein is given to describe certain co mponents and shall not be considered as a guarantee of characteristics. terms of delivery and rights to technical change reserved. we hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. information for further information on technology , delivery terms and conditions and prices please contact your nearest infineon technologies office ( www.infineon.com ). warnings due to technical requirements components may contain da ngerous substances. for information on the types in question please contact your nearest infineon technologies office. infineon technologies components may only be used in life-support devices or systems with the express written approval of infineon technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safe ty or effectiveness of that device or system. life support devices or systems are intended to be implanted in the hu man body, or to support an d/or maintain and sustain and/or protect human life. if they fail, it is reasonable to assume that the health of the user or other persons may be endangered. template: template_a4_3.0.fm / 3 / 2005-01-17 trademarks abm ? , ace ? , aop ? , arcofi ? , asm ? , asp ? , digitape ? , duslic ? , epic ? , elic ? , falc ? , geminax ? , idec ? , inca ? , iom ? , ipat ? -2, isac ? , itac ? , iwe ? , iworx ? , musac ? , muslic ? , octat ? , optiport ? , potswire ? , quat ? , quadfalc ? , scout ? , sicat ? , sicofi ? , sidec ? , slicofi ? , smint ? , socrates ? , vinetic ? , 10basev ? , 10basevx ? are registered trademarks of infineon technologies ag. 10 bases?, easyport?, vdslite? are trademarks of infi neon technologies ag. microsoft ? is a registered trademark of microsoft corporation, linux ? of linus torvalds, visio ? of visio corporation, and framemaker ? of adobe systems incorporated. two port bridge fiber to fast ethernet converter revision history: 2005-11-25, rev. 1.02 previous version: page/date subjects (major change s since last revision) 2004-05-05 rev. 1.0, first releas e of ninja c (adm6992c) 2005-05-20 rev. 1.01, document conversion from word to framemaker (xml) 2005-11-25 rev. 1.01 changed to rev. 1.02 minor change. included green package information data sheet 4 rev. 1.02, 2005-11-25 ninja c/cx adm6992c/cx table of contents table of contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 list of figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 list of tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 1 product overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 1.1 overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 1.2 features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 1.3 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 1.4 data lengths conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2 ninja c/cx interface description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.1 pin diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.2 pin type and buffer type abbreviation s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2.3 pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 3 function description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 3.1 10/100m phy block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 3.2 auto negotiation and speed configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 3.2.1 auto negotiation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 3.2.2 speed configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 3.3 switch functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 3.3.1 store & forward mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 3.3.2 modified cut-through mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 3.3.3 mii cut-through mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 3.4 basic operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 3.4.1 mac address learning & filtering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 3.4.2 address learning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 3.4.3 hash algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 3.4.4 address recognition and packet forwardi ng . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 3.4.5 address aging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 3.4.6 back off algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 3.4.7 inter-packet gap (ipg) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 3.4.8 illegal frames . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 3.4.9 half duplex flow control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 3.4.10 full duplex flow control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 3.4.11 bandwidth control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 3.4.12 interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 3.4.13 auto tp mdix function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 3.5 converter functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 3.5.1 fault propagation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 3.6 serial management interface (smi) register access . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 3.6.1 preamble suppression . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 3.6.2 read eeprom register via smi register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 3.6.3 write eeprom register via sm i register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 3.7 reset operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 3.7.1 write eeprom register via eeprom interf ace . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 4 registers description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 4.1 eeprom registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 4.2 eeprom register descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 table of contents data sheet 5 rev. 1.02, 2005-11-25 ninja c/cx adm6992c/cx table of contents 4.2.1 eeprom register format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 4.3 serial management registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 4.4 serial management register descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 4.4.1 serail management register format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 5 electrical specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 5.1 dc characterization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 5.2 ac characterization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 6 packaging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78 references . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 terminology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81 data sheet 6 rev. 1.02, 2005-11-25 ninja c/cx adm6992c/cx list of figures figure 1 ninja c/cx (adm6992 c/cx) block diagram 9 figure 2 ninja c/cx (adm6992c/cx ) 64-pin assignment 10 figure 3 smi read operation 25 figure 4 smi write operation 26 figure 5 power on reset timing 76 figure 6 eeprom interface timing 76 figure 7 smi timing 77 figure 8 64 pin lqfp outside dimension 78 list of figures data sheet 7 rev. 1.02, 2005-11-25 ninja c/cx adm6992c/cx list of tables table 1 data lengths conventions 9 table 2 abbreviations for pin type 11 table 3 abbreviations for buffer type 11 table 4 port 0/1 twisted pair interface (8 pins) 12 table 5 led interface (12 pins) 12 table 6 eeprom interface (4 pins) 15 table 7 configuration interface (28 pins) 16 table 8 ground/power interface (27 pins) 17 table 9 miscellaneous (14 pins) 17 table 10 speed configuration 21 table 11 smi read/write command format 25 table 12 eeprom register map 28 table 13 registers address spaceregisters address space 30 table 14 registers overview 30 table 15 register access types 31 table 16 registers clock domains 32 table 17 other packet filter control regsiters 43 table 18 other filter regsiters 45 table 19 other tag port rule 0 registers 48 table 20 other tag port rule 1 regsiters 49 table 21 serial management register map 55 table 22 registers address space 57 table 23 registers overview 57 table 24 register access types 58 table 25 registers clock domainsregisters clock domains 58 table 26 other counter registers 60 table 27 electrical absolute maximum rating 75 table 28 recommended operating conditions 75 table 29 dc electrical characteri stics for 3.3 v operation 75 table 30 power on reset timing 76 table 31 eeprom interface timing 76 table 32 smi timing 77 table 33 dimensions for 64 pin lqfp outside dimension 79 list of tables ninja c/cx adm6992c/cx product overview data sheet 8 rev. 1.02, 2005-11-25 1 product overview features and the block diagram. 1.1 overview the ninja c/cx (adm6992c/cx) is a single chip integrating two 10/100 mbps mdix tx/fx transceivers with a two-port 10/100m ethernet l2 switch controller. features include a converter mode to meet demanding applications, such as fiber-to-ethernet media converters . the ADM6992CX is the environmentally friendly ?green? package version. the ninja c/cx (adm6992c/cx) suppor ts 16 entries of packet classifica tion and marking or filtering for tcp/udp port numbering, ip protocol id and ethernet type. these can be configured either using the eeprom or on-the-fly using a small, low-cost micro controller. on the media side, the ninja c/cx (adm6992c/cx)?s 0 and 1 ports support auto-mdix 10base-t/100base-tx and 100base-fx as specified by the i eee 802.3 committee through uses of digital circui try and high speed a/d. the ninja c/cx (adm6992c/cx) also supports a serial management interface (smi), which is initialized and configured using a small low-cost micro controller. it also provides the port status for remote agent monitoring and a smart counter for reporting port statistics. 1.2 features main features: ? 2-port10/100m switch integrated with a 2-port phy (10/100tx and 100fx) ? provides tx<--> fx converter modes with link pass through (lpt) ? built-in data buffer 6kx64bit sram ? up to 1k of unicast. mac addresses with a 4-way associative hashing table ? mac address learning table with aging function ? supports store & forward frame forwarding, modify cut- through frame forwarding, and fast cut-through frame forwarding. ? forwarding and filtering at non-blocking full wire speed ? 802.3x flow control for full duplex and back-pressure for half duplex ? supports auto-negotiation ? supports auto cross-over ? packet lengths up to 9216 bytes. ? 16 entries of packet classification and marking or filt ering for tcp/udp port numbering, ip protocol id and ethernet type ? serial management interface for low-end cpu ? hardware bandwidth control support for both ingress/egress traffic ? provides port status for remote agent monitoring ? provides smart counters fo r port statistics reporting ? 64 lqfp packaging with 1.8 v/3.3 v power supply data sheet 9 rev. 1.02, 2005-11-25 ninja c/cx adm6992c/cx product overview 1.3 block diagram figure 1 ninja c/cx (adm6992c/cx) block diagram 1.4 data lengths conventions table 1 data lengths conventions qword 64 bits dword 32 bits word 16 bits byte 8 bits nibble 4 bits ninja c/cx adm6992c/cx ninja c/cx interf ace description data sheet 10 rev. 1.02, 2005-11-25 2 ninja c/cx inte rface description this chapter describes pin diagram , pin type and buffer type abbreviations, and pin descriptions. 2.1 pin diagram figure 2 ninja c/cx (adm6992c/cx) 64-pin assignment data sheet 11 rev. 1.02, 2005-11-25 ninja c/cx adm6992c/cx ninja c/cx interf ace description 2.2 pin type and buffer type abbreviations standardized abbreviations: table 2 abbreviations for pin type abbreviations description i standard input-only pin. digital levels. o output. digital levels. i/o i/o is a bidirectional input/output signal. ai input. analog levels. ao output. analog levels. ai/o input or output. analog levels. pwr power gnd ground mcl must be connected to low (jedec standard) mch must be connected to high (jedec standard) nu not usable (jedec standard) nc not connected (jedec standard) table 3 abbreviations for buffer type abbreviations description z high impedance pu1 pull up, 10 k ? pd1 pull down, 10 k ? pd2 pull down, 20 k ? ts tristate capability: the corres ponding pin has 3 operationa l states: low, high and high- impedance. od open drain. the corresponding pin has 2 oper ational states, active low and tristate, and allows multiple devices to shar e as a wire-or. an external pull-up is required to sustain the inactive state until another agent drives it, and must be provid ed by the central resource. oc open collector pp push-pull. the corresponding pin has 2 operational states: active-low and active-high (identical to output with no type attribute). od/pp open-drain or push-pull. the corresponding pin can be configured either as an output with the od attribute or as an output with the pp attribute. st schmitt-trigger characteristics ttl ttl characteristics ninja c/cx adm6992c/cx ninja c/cx interf ace description data sheet 12 rev. 1.02, 2005-11-25 2.3 pin descriptions interfaces: ? port 0/1 twisted pair interface, 8 pins ? led interface, 12 pins ? eeprom interface, 4 pins ? configuration interface, 28 pins ? ground/power interface, 27 pins ? miscellaneous, 14 pins note: if not specified, all signals default to digital signals. table 4 port 0/1 twisted pair interface (8 pins) pin or ball no. name pin type buffer type function 18 txp_0 ai/o twisted pair transmit output positive. 30 txp_1 ai/o 19 txn_0 ai/o twisted pair transmit output negative. 29 txn_1 ai/o 22 rxp_0 ai/o twisted pair receive input positive. 26 rxp_1 ai/o 23 rxn_0 ai/o twisted pair receive input negative. 25 rxn_1 ai/o 21 fxsdp_0 ai omd signal detect in 27 fxsdp_1 ai table 5 led interface (12 pins) pin or ball no. name pin type buffer type function 52 lnkact_0 i/o ttl, pd, 8ma port0 link & active led/link led. if ledmode_0 is 1, this pin indicates both link status and rx/tx activity. when link status is link_up, lnkact_0 will be turned on. while port0 is receiving /transmitting data, lnkact_0 will be off for 100ms and then on for 100ms. if ledmode[0] is 0, this pin only indicates rx/tx activity. led_data_0 ledmode_0 led mode for link/act led of port0. during power on reset, value will be latched by ninja c/cx (adm6992c/cx) at the rising e dge of resetl as ledmode_0. data sheet 13 rev. 1.02, 2005-11-25 ninja c/cx adm6992c/cx ninja c/cx interf ace description 53 lnkact_1 i/o ttl, pd, 8ma port1 link & active led/link led. if ledmode_2 is 1, this pin indicates both link status and rx/tx activity. when link status is link_up, lnkact_1 will be turned on. while port1 is receiving /transmitting data, lnkact_1 will be off for 100ms and then on for 100ms. if ledmode[2] is 0, this pin only indicates rx/tx activity. led_data_1 ledmode_1 led mode for link/act led of port0 & port1. during power on reset, value will be latched by ninja c/cx (adm6992c/cx) at the rising e dge of resetl as ledmode_1. if ledmode_1 is 1, dupcol[1:0] will display both duplex condition and collision status. if ledmode_1 is 0, only co llision status will be displayed. 61 dupcol_0 i/o ttl, pd, 8ma port0 duplex/collision led if ledmode_1 is 1, this pin indicates both duplex condition and collision status. when full_dupl ex, this pin will be turned on for port0. when half_duplex and no collision occurs, this pin will be turned off. when half_duplex and a collision occurs, this pin will be off fo r 100ms and then on for 100ms. if ledmode_1 is 0, this pin in dicates collision status. when in half_duplex and a collision occurs, this pin will be off for 100ms and turn on for 100ms. led_col_0 collision led dis_learn disable address learning. during power on reset, value will be latched by ninja c/cx (adm6992c/cx) at the rising e dge of resetl as dis_learn. if dis_learn is 1, mac addre ss learning will be disabled. 62 dupcol_1 i/o ttl, pu, 8ma port1 duplex if ledmode_1 is 1, this pin indicates both duplex condition and collision status. when full_dupl ex, this pin will be turned on for port1. when half_duplex and no collision occurs, this pin will be turned off. when half_duplex and a collision occurs, this pin will be off for 100ms and then on for 100ms. if ledmode_1 is 0, this pin in dicates collision status. when half_duplex and a collision occurs, this pin will be off for 100ms and turn on for 100ms. led_col_1 collision led 58 ldspd_0 i/o ttl, pd, 8ma port0 speed led used to indicate speed status of port0. when operating in 100mbps this pin is turned on, and when operating in 10mbps this pin is off. fxmode0 fxmode0 during power on reset, value will be latched by ninja c/cx (adm6992c/cx) at the rising edge of resetl as bit 0 of fxmode. table 5 led interface (12 pins) (cont?d) pin or ball no. name pin type buffer type function ninja c/cx adm6992c/cx ninja c/cx interf ace description data sheet 14 rev. 1.02, 2005-11-25 60 ldspd_1 i/o ttl, pd, 8ma speed led, port1 used to indicate speed status of port1. when operating in 100mbps this pin is turned on, and when operating in 10mbps this pin is off. led_fiber_sd led_fiber_sd. used to indicate signal status of port1 when ninja c/cx (adm6992c/cx) is operating in converter mode. ledmode2 led mode for link/act led of port1. during power on reset, value will be latched by ninja c/cx (adm6992c/cx) at the rising edge of resetl as ledmode2. 0 b tbd , act 1 b tbd , link/act 63 led_link_0 i/o ttl, pu, 8ma port0 link led this pin indicates link status. wh en port0 link status is link_up, this pin will be turned on. fxmode1 fxmode1 during power on reset, value will be latched by ninja c/cx (adm6992c/cx) at the rising edge of resetl as bit 1 of fxmode. fxmode [1:0] interface 00 b tbd , both port0 & port1 are tp port 01 b tbd , port0 is tp port and port1 is fx port 10 b tbd , port0 is tp port and port1 is fx port (converter mode) 11 b tbd , both port0 & port1 are fx port 64 led_link_1 i/o ttl, pu, 8ma port1 link led this pin indicates link status. wh en port1 link status is link_up, this pin will be turned on. bypass_paus e bypass frame which destination address is reserved i eee mac address. during power on reset, value will be latched by ninja c/cx (adm6992c/cx) at the risi ng edge of resetl as bypass_pause. 0 b d , disable 1 b e , enable 55 led_full_0 i/o ttl, pu, 8ma port0 full duplex led this pin indicates current duplex condition of port0. when full_duplex, this pin will be turned on. when half_duplex this pin will be turned off. chipid_0 chip id bit 0. during power on reset, value will be latched by ninja c/cx (adm6992c/cx) at the risi ng edge of resetl as chipid_0 . table 5 led interface (12 pins) (cont?d) pin or ball no. name pin type buffer type function data sheet 15 rev. 1.02, 2005-11-25 ninja c/cx adm6992c/cx ninja c/cx interf ace description 56 led_full_1 i/o ttl, pu, 8ma port1 full duplex led this pin indicates current duplex condition of port1. when full_duplex, this pin will be turned on. when half_duplex this pin will be turned off. chipid_1 chip id bit 1 during power on reset, value will be latched by ninja c/cx (adm6992c/cx) at the risi ng edge of resetl as chipid_1 . chipid_1 : chipid_0 ] 00 b tbd , master device 01 b tbd , slave device 1x b tbd , slave device 50 led_lpbk i/o ttl, pu, 8ma loop back test led while performing loop back test this pin is turned on. chipid_2 chip id bit 2 during power on reset, value will be latched by ninja c/cx (adm6992c/cx) at the risi ng edge of resetl as chipid_2 . 51 led_wan_fail o ttl, pd, 8mu wan fail led when receiving an oam frame which has a s2 bit = 1, this pin is turned on. disbp disable back pressure during power on reset, value will be latched by ninja c/cx (adm6992c/cx) at the risi ng edge of resetl as disbp . 0 b e , enable back-pressure (default) 1 b d , disable back-pressure table 6 eeprom interface (4 pins) pin or ball no. name pin type buffer type function 2 eedo i ttl, pu eeprom data output serial data input fr om eeprom. this pin is internal pull-up. 5 eecs/ifsel i/o pd, 4ma eeprom chip select this pin is an active high chip enabled for eeprom. when resetl is low, it will be tristate. 0 b sm , select serial management interface 1 b ee , select eeprom interface table 5 led interface (12 pins) (cont?d) pin or ball no. name pin type buffer type function ninja c/cx adm6992c/cx ninja c/cx interf ace description data sheet 16 rev. 1.02, 2005-11-25 4 eeck/sdc i/o ttl, pu, 4ma serial clock this pin is the eeprom clock source. when resetl is low, it will be tristate. this pin is internal pull-up. if ifsel is 1, this pin is used as eeck. if ifsel is 0, this pin is used as sdc. 3 eedi/sdio i/o ttl, pu, 4ma eeprom serial data input this pin is the output for serial data transfer. when resetl is low, it will be tristate. if ifsel is 1, this pin is used as eedi. if ifsel is 0, this pin is used as sdio. table 7 configuration interface (28 pins) pin or ball no. name pin type buffer type function 47 p0_andis i ttl, pd auto-negotiation disable for port0 0 b e , enable 1 b d , disable 46 p0_rechalf i ttl, pd recommend half duplex communication for port0 0 b f , full 1 b h , half 45 p0_rec10 i ttl, pd recommend 10m for port0 0 b 100 , 100m 1 b 10 , 10m 43 p0_fcdis i ttl, pd flow control disable for port0 0 b e , enable 1 b d , disable 42 p1_andis i ttl, pd auto-negotiation disable for port1 0 b e , enable 1 b d , disable 41 p1_rechalf i ttl, pd recommend half duplex communication for port1 0 b f , full 1 b h , half 40 p1_rec10 i ttl, pd recommend 10m for port1 0 b 100 , 100m 1 b 10 , 10m 39 p1_fcdis i ttl, pd flow control disable for port1 0 b e , enable 1 b d , disable table 6 eeprom interface (4 pins) (cont?d) pin or ball no. name pin type buffer type function data sheet 17 rev. 1.02, 2005-11-25 ninja c/cx adm6992c/cx ninja c/cx interf ace description 34 xoven i ttl, pu auto-mdix enable. 0 b d , disable 1 b e , enable 35 p0_mdi i ttl, pu mdi/mdix control for port0 this setting will be ignor ed if enabled auto-mdix. 0 b mdix , mdix 1 b mdi , mdi table 8 ground/power interface (27 pins) pin or ball no. name pin type buffer type function 20, 28 gndtr gnd, a ground used by ad receiver/transmitter block. 17, 31 vcca2 pwr, a 1.8 v used for analogue block 24 vccad pwr, a 3.3 v used for tx line driver 14 gndbias gnd, a ground used by digital substrate 16 vccbias pwr, a 3.3 v used for bios block 11 gndpll gnd, a ground used by pll 10 vccpll pwr, a 1.8 v used for pll 6, 32, 49 gndik gnd, a ground used by digital core and pre-driver 33, 44, 59 vccik pwr, d 1.8 v used for digital core and pre-driver 54 gndo gnd, d ground used by digital pad 57 vcc3o pwr, d 3.3 v used for digital pad. table 9 miscellaneous (14 pins) pin or ball no. name pin type buffer type function 1 int o ttl, od, 4ma interrupt this pin will be used to interrupt external management device. when eeprom register 0x 5 bit [15] is 0, this pin is low-active. when eeprom register 0x5 bit [15] is 1, this pin is high-active. 12 control ao fet control signal the pin is used to control fet for 3.3 v to 1.8 v regulator. 15 rtx a tx resistor 13 a_pd_detect a analog reference voltage 7 rc i ttl, st rc input for power on reset ninja c/cx (adm6992c/cx) sample pin rc as resetl with the clock input from pin xi. table 7 configuration interface (28 pins) (cont?d) pin or ball no. name pin type buffer type function ninja c/cx adm6992c/cx ninja c/cx interf ace description data sheet 18 rev. 1.02, 2005-11-25 8 xi ai 25m crystal input 25m crystal input. variation is limited to +/- 50ppm. 9 xo ao 25m crystal output when connected to oscillator, th is pin should left unconnected. 37 test i ttl, pd test pin during power on rese t, value will be latched by ninja c/cx (adm6992c/cx) at the rising edge of resetl as test. connect to gnd at normal application. 38 scan_md i ttl, pd scan mode for test only. connect to gnd at normal application. table 9 miscellaneous (14 pins) (cont?d) pin or ball no. name pin type buffer type function data sheet 19 rev. 1.02, 2005-11-25 ninja c/cx adm6992c/cx function description 3 function description the ninja c/cx (adm6992c/cx) int egrates two 100base-x physical la yer devices (phy), two complete 10baset modules, a two-port 10/100 switch controller and memory into a single chip for both 10mbps and 100 mbps ethernet switch operation. it also supports 100base- fx operations through extern al fiber-optic transceivers. the device is capable of operating in either full-duple x or half-duplex mode in both 10 mbps and 100 mbps operation. operation modes can be selected by hardwa re configuration pins, software settings of management registers, or determined by the on-chip auto negotiation logic. the ninja c/cx (adm6992c/cx) c onsists of four major blocks: ? oam engine ? 10/100m phy block ? switch controller block ? built-in 6kx64 ssram 3.1 10/100m phy block the 100base-x section of the device im plements the following functional blocks: ? 100base-x physical coding sub-layer (pcs) ? 100base-x physical medium attachment (pma) ? 100base-x physical medium dependent (pmd) the 10base-t section of the device implements the following functional blocks: ? 10base-t physical layer signaling (pls) ? 10base-t physical medium attachment (pma) the 100base-x and 10base-t sections share the following functional blocks: ? clock synthesizer module ? mii registers ? ieee 802.3u auto negotiation the interfaces used for the communication between the phy block and switch core is a mii interface. an auto mdix function is supported. this function can be enabled/disabl ed using the hardware pin. a digital approach for the integrated phy of the ni nja c/cx (adm6992c/cx) has been adopted. ninja c/cx adm6992c/cx function description data sheet 20 rev. 1.02, 2005-11-25 3.2 auto negotiation a nd speed configuration 3.2.1 auto negotiation the auto negotiation function provides a mechanism fo r exchanging configuration information between two ends of a link segment and automatically selecting the highes t performance mode of operat ions supported by both devices. fast link pulse (flp) bu rsts provide the signa ling used to communicate auto negotiation abilities between two devices at each end of a link segment. for furt her details regarding auto negotiation, refer to clause 28 of the ieee 802.3u specification. the ninja c/cx (adm6992 c/cx) supports four diff erent ethernet protocols, so the inclusion of auto n egotiation ensures that the highest performance protocol will be selected based on the ability of the link partner. the auto negotiation function within th e ninja c/cx (adm6992c/cx) can be cont rolled either by internal register access or by the use of configuratio n pins. if disabled, auto negotiation will not occur until software enables bit 12 in mii register 0. if auto negoti ation is enabled, t he negotiation process will commence immediately. when auto negotiati on is enabled, the ninja c/cx (adm6992c/cx) transmits the abilities programmed into the auto negotiation advertisement register at address 04 h via flp bursts. any combination of 10 mbps, 100 mbps, half duplex, and full duplex modes may be selected. auto negotiation controls the exchange of configuration information. upon successfu lly auto negotiating, the abilit ies reported by the link part ner are stored in the auto negotiation link pa rtner ability register at address 05 h . the contents of the ?auto negotiation link partner ability re gister? are used to automatically configure the highest performance protocol between the local and far-end nodes. software can determine which mode has been configured by auto negotiation, by comparing the contents of register 04 h and 05 h and then selecting the technology whose bit is set in both registers of highest priority relative to the following list: 1. 100base-tx full duplex (highest priority) 2. 100base-tx half duplex 3. 10base-t full duplex 4. 10base-t half duplex (lowest priority) the basic mode control register at address 0 h controls the enabling, disabling and restarting of the auto negotiation function. when auto negotiati on is disabled, the speed selection bi t (bit 13) controls switching between 10 mbps or 100 mbps operation, while the duplex mode bi t (bit 8) controls switching between full duplex operation and half duplex operation. the speed selection and duple x mode bits have no effect on the mode of operations when the auto negotiation enabled bit (bit 12) is set. the basic mode status register at address 1 h indicates the set of available abilitie s for technology types (bit 15 to bit 11), auto negotiation ability (bit 3) , and extended register capab ility (bit 0). these bits ar e hardwired to indicate the full functionality of the ninj a c/cx (adm6992c/cx). the bm sr also provides status on: ? whether auto negotiation is complete (bit 5) ? whether the link partner is advertising th at a remote fault has occurred (bit 4) ? whether a valid link has been established (bit 2) the auto negotiation advertisement register at address 04 h indicates the auto negotiation abilities to be advertised by the ninja c/cx (adm6992c/cx). all available abilities ar e transmitted by default, but writing to this register or configuring external pi ns can suppress any ability. the auto negotiation link partner ability register at address 05 h indicates the abilities of the link partner as indicated by auto negotiation communica tion. the contents of this register are considered valid when the auto negotiation complete bit (bit 5, register address 1 h ) is set. 3.2.2 speed configuration the twelve sets of four pins listed in table 10 configure the speed capability of each channel of the ninja c/cx (adm6992c/cx). the logic states of th ese pins are latched into the advert isement register (register address 4 h ) data sheet 21 rev. 1.02, 2005-11-25 ninja c/cx adm6992c/cx function description for auto negotiation purpose. these pins are also used fo r evaluating the default value in the base mode control register (register 0 h ) according to table 10 . in order to make these pins have the same read/write priority as software, they should be programmed to 11111111 b in case a user wishes to update the advertisement register through software. 3.3 switch functional description the ninja c/cx (adm6992c/cx) supports three types of data forwarding mode, store & forward mode, modified and mii cut-through. 3.3.1 store & forward mode the ninja c/cx (adm6992c/cx) allows switching between different speed media (e.g. 10basex and 100basex) in store & forward m ode. the entire received frame will be stored into its packet bu ffer. the ninja c/cx (adm6992c/cx) checks the length and frame check se quence (fcs) of the received frame to prevent the forwarding of corrupted packets before forwarding to the destination port. a mac address filtering process can be enabled to filter local traffic to improve overall networ k performance. the maximum packet length is up to 9216 bytes in this mode. the maximum packet length is defined in bi t [13:0] of eepr om register 03 h . table 10 speed configuration advertis e all capabilit y advertis e single capabili ty paralle l detect follow ieee std. auto negoti- ation (pin & eeprom) speed (pin & eeprom ) duplex (pin & eeprom ) auto negot iation advertise capability parallel detect capability 10 0f 10 0h 10 f 10 h 10 0f 10 0h 10 f 10 h 1 0 0 1 x x 1 1 1 1 1 1 0 1 0 1 0 1 1 x x 1 1 1 1 1 0 1 0 1 1 1 0 1 x x 1 1 0 0 0 1 0 0 0 1 1 1 1 x x 1 1 0 0 0 0 1 0 0 0 0 0 1 1 1 1 1 1 1 1 1 0 1 0 0 0 1 1 1 1 1 1 1 1 1 0 1 0 1 0 1 0 1 1 1 1 1 0 0 0 1 0 0 0 0 1 1 1 1 1 1 1 0 0 0 0 1 0 0 0 0 x 1 1 0 1 0 1 0 1 0 1 0 1 0 1 x 1 1 0 1 0 1 0 0 0 1 0 0 0 0 0 1 0 1 1 0 0 1 1 0 0 1 0 0 0 1 1 0 1 1 0 0 1 1 0 0 0 1 0 1 0 1 0 1 1 0 0 1 0 0 0 1 0 0 1 1 1 0 1 1 0 0 1 0 0 0 0 1 0 x x 1 0 0 1 0 0 0 1 0 0 0 1 x x x 0 1 1 0 1 ? ? ? ? ? ? ? x x x 0 1 0 0 ? 1 ? ? ? ? ? ? x x x 0 0 1 0 ? ? 1 ? ? ? ? ? x x x 0 0 0 0 ? ? ? 1 ? ? ? ? ninja c/cx adm6992c/cx function description data sheet 22 rev. 1.02, 2005-11-25 3.3.2 modified cut-through mode the ninja c/cx (adm6992c/cx) begins to forward the received packet when it receives the first 64 bytes of the packet. the latency is about 512 bi ts time width. the ninja c/cx (a dm6992c/cx) will not forward fragment packets. the mac address learning & filtering should be disabled in this mode, because the received packets may be corrupted. the maximum packet length is up to 9216 by tes in this mode. the maximum packet length is defined in bit [13:0] of eeprom register 03 h . 3.3.3 mii cut- through mode the ninja c/cx (adm6992 c/cx) begins to forward the received packet at the beginning of the received packet. it provides the minimum latency in th is mode. the maximum packet length is 9216 bytes if the clock difference between mii receive clock and mii transmit clock is 200ppm. 3.4 basic operations 3.4.1 mac address le arning & filtering the ninja c/cx (adm6992c/cx) adopts 4- way associative hash architecture to store the mac address table. it can store up to a maximum 1k of mac addresses. in store & forward mode, the ninja c/cx (adm6992c/cx) receives incoming packets from one of its ports, searches in the address table for the destination mac a ddress, and then forwards the packet to the other port, if appropriate. if the destination address is not found in the address table, the ninja c/cx (adm6992c/cx) treats the packet as a broadcast packet and forwards the packet to the other ports. if the destination port is the same with the port where the packet received from, the ninja c/ cx (adm6992c/cx) treats the packet as a local traffic packet and discards it. 3.4.2 address learning the ninja c/cx (adm6992c/cx) searches for the source address (sa) of an incoming packet in the address table and acts as below: 1. the ninja c/cx (adm6992c/cx) au tomatically learns the port number of attached network devices by examining the source mac address of all incoming packets at wire speed 2. if the sa was not found in the address table (a ne w address), the ninja c/cx (adm6992c/cx) waits until the end of the packet (non-error pa cket) and updates the address table 3. if the sa was found in the address table, then the aging va lue of each corresponding entry will be reset to 0 4. when the da is in pause mode, th en the learning process will be disabl ed automatically by the ninja c/cx (adm6992c/cx) 3.4.3 hash algorithm the ninja c/cx (adm6992c/cx) supports two types of hash algorithms for address learning & filtering. the first is the crc-ccitt polynomial method. the 48 bits mac addre ss is reduced to a 16 bits crc hash value. bit [7:0] of the crc are used to index the 1k address table. the crc-ccitt polynomial is the second is the direct-map method. the 48-bit mac add ress is mapped into a 8 bits address spaced by xor- method to index the 1k address table. the hash type can be selected by us ing bit [15] of eeprom register 03 h . data sheet 23 rev. 1.02, 2005-11-25 ninja c/cx adm6992c/cx function description 3.4.4 address recognition and packet forwarding the address learning & filtering process forwards the incoming packets between bridged ports according to the destination address (da) as below. 1. if the da is a unicast address and the address was found in the address table, the ninja c/cx (adm6992c/cx) will check the port number and act as follows: a) if the port number is equal to the port on which the packet was received, the packet is discarded. b) if the port number is different from the port on whic h the packet was rece ived, the packet is forwarded across the bridge. 2. if the da is a unicast address and the address was no t found, the ninja c/cx (a dm6992c/cx) treats it as a multicast packet and forwards it across the bridge. 3. if the da is a multicast address, the packet is forwarded across the bridge. 4. if the da is pause command (01- 80-c2-00-00-01), then this packet will be dropped by the ninja c/cx (adm6992c/cx). the ninja c/cx (adm6992 c/cx) can issue and learn pause commands. 5. the ninja c/cx (adm6992c/cx) will forw ard by default or filt er out the packet with da of (01-80-c2-00-00- 00), discard the packet with da of (01-80-c2-00-00-01), filter out the packet with da of (01-80-c2-00-00-02 ~ 01-80-c2-00-00-0f), and forward the packet with da of (01-80-c2-00-00-10 ~ 01-80-c2-00-00-ff) decided by eeprom reg. 0e h . 3.4.5 address aging address aging is supported for topology changes such as an address moving from one port to the other. when this happens, the ninja c/cx (adm6992c /cx) internally has 300 seconds ti mer, after which the address will be ?aged out? (removed) from the address table. aging func tion can enabled/disabled by the user. normally, disabling the aging function is for security purposes. 3.4.6 back off algorithm the ninja c/cx (adm6992c/cx) implements the truncated exponential back off algorithm compliant to the 802.3 csma-cd standard. the ninja c/cx (adm6992c/cx) will re start the back off algorith m by choosing 0-9 collision counts. the ninja c/cx (adm6992c/cx) resets the collision counter after 16 consecutive retran smitting trials. 3.4.7 inter-packet gap (ipg) ipg is the idle time between any two successive packets from the same port. the typical number is 96 bits time. the value is 9.6us for 10mbps ethernet, 960ns for 100mbps fast ethernet, and 96ns for 1000m. the ninja c/cx (adm6992c/cx) provides an option of 92 bit-time g aps in the eeprom to preven t packet loss when flow control is turned off and the clock p.p.m. value differs. 3.4.8 illegal frames in store & forward mode, the ninja c/ cx (adm6992c/cx) will discard all ille gal frames such as small packets (less than 64 bytes), oversi zed packets (greater than the value which is defined in bi t [13:0] of eepr om register 03 h ) and bad crc. dribblin g packing with good crc value will a ccept by ninja c/ cx (adm6992c/cx). in modified cut-through mode, the ni nja c/cx (adm6992c/cx) will forward a ll received packets except for small packets (less than 64 bytes). in mii cut-through mode, the ninja c/cx (a dm6992c/cx) will forward all received packets. 3.4.9 half duplex flow control a back pressure function is supported for half-duplex operation. when the ninja c/cx (adm6992c/cx) cannot allocate a received buffer for an incomi ng packet (buffer full), the device w ill transmit a jam patt ern on the port, thus forcing a collision. back pressure is disabled by disbp which is set du ring resetl assertio n. a proprietary ninja c/cx adm6992c/cx function description data sheet 24 rev. 1.02, 2005-11-25 algorithm is implemented inside the ninja c/cx (adm6992 c/cx) to prevent the back pressure function causing hub partition under a heavy traffic environment and reduce the packet lost rate to increase the whole system performance. 3.4.10 full duplex flow control when a full duplex port runs out of its received buffer space, a pause packet command will be issued by the ninja c/cx (adm6992c/cx) to notify th e packet sender to pause transmission . this frame based flow control is totally compliant to ieee 802.3x . the ninja c/cx (adm6992c/cx) can issue or receive pause packets. 3.4.11 bandwidth control ninja c/cx (adm6992c/cx) supports hardware-based band width control for both ingress and egress traffics. ingress and egress rates can be limited independently on a per port base. the ninja c/cx (adm6992c/cx) uses 8ms at the scale, and the minimum bandwidth control unit is 4 kbit/s so users can configure the rate equal to k * 4 kbit/s, 1<=k<=25000. the ninja c/cx (adm6992c/cx) maintains two counters (input and output) for each port. for example, if users want to limit the rate to 64 kbit/s, they should configure the bandwidth control threshold to 16. for each time unit, the ninja c/cx (adm6992c/cx) will add 64 to the c ounter and decrease the byte length when receiving a packet during this period. when the co unter is decreased to zero, we can divide the control behavior into two parts: 1. for the ingress control, the ingress port will not stop receiving packets. if flow cont rol is enabled, pause packets will be transmitted, if back pressure is enabled, jam packets will be transmitte d, and if the above functions are not enabled, the packet will be discarded. 2. for the egress control, the egress port will not trans mit any packets. the port receiving packets that are forwarded to the egress port will transmit pause packets if flow control is enabled, transmit jam packets if back pressure is enabled, and discard packets if all the above functions are not enabled. 3.4.12 interrupt with the use of external cpu support, the ninja c/cx (adm6992c/cx) can issue an interrupt to the cpu if any event defined in smi interrupt register 10 h and smi interrupt mask register 11 h occurs. 3.4.13 auto tp mdix function the normal application in which a switch connects to a ni c card is by a one-to-one tp cable. if the switch connects to other devices such as another switch, it can be done by two ways. the first is to use a cross over tp cable and the second way is to use an extra rj45 conn ector by internally crossing over the txp/txn and rxp/rxn signals. by using the seco nd way, customers can use a one-to-one cable to connect two switch devices. all these efforts add extra costs and are not a good solution. the ninja c/cx (adm6992c/cx) provides an auto mdix function, which adjusts the txp/txn a nd rxp/rxn automatically on th e correct pins. users can use one-to-one cabling between the ni nja c/cx (adm6992c/cx) and other de vices either switches or nics. 3.5 converter functional description 3.5.1 fault propagation the ninja c/cx (ninja c/cx (adm6992c/cx)) media co nverter incorporates a f ault propagation feature, which allows indirect sensing of a fiber link loss vi a the 10/100base-tx utp connection. whenever the ninja c/cx (ninja c/cx (adm6992c/cx)) media converter detects a link loss condition on the received fiber (fiber lnk off), it disables its utp link pulse so that a link loss condition will be sensed on the utp port to which the data sheet 25 rev. 1.02, 2005-11-25 ninja c/cx adm6992c/cx function description ninja c/cx (ninja c/cx (adm6992c/cx)) media converte r is connected. this link loss can then be sensed and reported by a network ma nagement agent in the remote utp port?s host equip ment. this feature will affect the ninja c/cx (ninja c/cx (adm6992c/cx)) utp lnk led. the ninja c/cx (ninja c/cx (adm699 2c/cx)) media converter also incorporates a far end fault feature, which allows the stations on both ends of a pair of fibers to be informed w hen there is a problem with one of the fibers. without far end fault, it is impossible for a fiber interface to detect a problem that affects only its transmitting fiber. when far end fault is su pported and e nabled, a loss of received signal (link) will cause th e transmitter to generate a far end fault pattern in order to inform the device at the far end of the fiber pair that a fault has occurred. unless fiber link loss occurs or if the utp port link fails , the ninja c/cx (ninja c/cx (adm6992c/cx)) media converter will also generate a far end faul t pattern in order to inform the device at t he far end of the fiber pair that a fault has occurred. 3.6 serial management interf ace (smi) register access the smi consists of two pins, management data clock (sdc) and management data input/output (sdio). the ninja c/cx (adm6992c/cx) is design ed to support an sdc frequency up to 25 mhz. the sdio line is bi- directional and may be shared with other devices. the sdio pin requires a 1.5 k pull-up wh ich, during idle and turn around periods, will pull sdio to a logic one state. ninja c/cx (adm6992c/cx) requires a single initialization sequence of 35 bits of preamble following power- up/hardware reset. the first 35 bits are preamble consis ting of 35 contiguous logic one bits on sdio and 35 corresponding cycles on sdc. following preamble is the st art-of-frame field indicated by a <01> pattern. the next field signals the operation code (op): <10> indicates read from management register operation, and <01> indicates write to management register operation. the next fi eld is the management register address. it is 10 bits wide and the most significant bit is transferred first. during read operation, a 2-bit turn around (ta) time s pacing between the register addr ess field and data field is provided for the sdio to avoid contention. following t he turnaround time, a 32-bit data stream is read from or written into the management register s of the ninja c/cx (adm6992c/cx). figure 3 smi read operation table 11 smi read/write command format operation preamble sfd op chipid[1:0] unused register address ta data read 35?1?s 01 10 2 bits chipid 00 6 bits address z0 32 bits data read write 35?1?s 01 01 2 bits chipid 00 6 bits address 10 32 bits data write ninja c/cx adm6992c/cx function description data sheet 26 rev. 1.02, 2005-11-25 figure 4 smi write operation 3.6.1 preamble suppression the smi of ninja c/cx (adm6992c/cx) supports a prea mble suppression mode. if the station management entity (i.e. mac or other management controller) determ ines that all devices which are connected to the same sdc/sdio in the system support preamb le suppression, then the station management entity needs not to generate preamble for each management transaction. the ninja c/cx (adm6992c/cx) requires a single initialization sequence of 35 bits of preamble following power-up/hardware rese t. this requirement is generally met by pulling-up the resistor of sdio . while the ninja c/cx (adm6992c/cx ) will respond to management accesses without preamble, a minimum of one idle bit between management transactions is required. when ninja c/cx (adm6992c/cx) detects that there is address match, then it will enable read/write capability for external access. when address is mismatched, then ninja c/cx (adm6992c/cx) will tristate the sdio pin. 3.6.2 read eeprom regi ster via smi register the following 2 steps are for reading the data of eeprom register via smi interface. write the address of the desired eeprom regi ster and read command to smi register 013 h ex. <35?1?s><01><01><00000><10011><10>< 000 0000000 000001 0000000000000000 > cmd address data read ninja c/cx (adm6992c/cx) internal eeprom mapping reg.1 h . read smi register 013 h . the data of desired eeprom register will be in bit [15:0]. ex. <35?1?s><01><10><00000><10011> data sheet 27 rev. 1.02, 2005-11-25 ninja c/cx adm6992c/cx function description 3.6.3 write eeprom regi ster via smi register to write data into desired eeprom register, write the addr ess of the eeprom register. ex. <35?1?s><01><01><00000><00100><10>< 001 0000000 000001 0001000001000000> cmd address data write ninja c/cx (adm6992c/cx) internal eeprom mapping reg.1 h . with value 820f. 3.7 reset operation the ninja c/cx (adm6992c/cx) can be reset either by ha rdware or software. a hardware reset is accomplished by applying a negative pulse, with du ration of at least 100 ms to the rc pin of the ninja c/cx (adm6992c/cx) during normal operation to guarantee internal ssram is reset properly. hardware reset operation samples the pins and initializes a ll registers to their default values. this process includes re-evaluation of all hardware configurable registers. a hardware reset affects all embedded phys in the device. software reset can reset all embedded phy and it does not latch the external pins nor reset the registers to their respective default values. this can be achieved by writing ff to eeprom reg.3f h . logic levels on several i/o pins are detected during a hardw are reset to determine the initial functionality of ninja c/cx (adm6992c/cx). some of these pins are used as output ports after reset operation. care must be taken to ensure that the configuration setup will not interf ere with normal operations. dedicated configuration pins can be tied to vcc or ground directly. configuration pins multiple xed with logic level output functions should be either weakly pulled up or weakly pulled down through external resistors. 3.7.1 write eeprom regist er via eeprom interface to write data into desired eeprom register via eeprom interface. if external eeprom 93c46 or 93c66 exists, any writ e programming instructions after ewen instruction is executed can be updated effectively on eeprom cont ent and ninja c/cx (adm6 992c/cx) internal mapping register on the same time. if no external eeprom exists, eecs/e eck/eedi must be kept tristate at least 100ms after ha rdware reset. any write programming instructions after ewen instruction is executed can be updated effectively on ninja c/cx (adm6992c/cx) internal mapping register. please notic e that ninja c/cx (adm6992c /cx) can only identify 93c66-programmi ng instructions if no external eeprom. ninja c/cx adm6992c/cx registers description data sheet 28 rev. 1.02, 2005-11-25 4 registers description this chapter describes descript ions of eeprom registers and serial management registers. 4.1 eeprom registers table 12 eeprom register map register bit 15-8 bit 7-0 default value 00 h signature 4154 h 01 h port 0 configuration 104f h 02 h port 1 configuration 104f h 03 h miscellaneous configuration 0 0600 h 04 h miscellaneous configuration 1 0000 05 h miscellaneous configuration 2 0014 h 06 h buffer management configuration 0 0198 h 07 h buffer management configuration 1 0258 h 08 h buffer management configuration 2 0008 h 09 h bandwidth control configuration 0 0000 h 0a h bandwidth control configuration 1 0000 h 0b h bandwidth control configuration 2 0000 h 0c h bandwidth control configuration 3 0000 h 0d h phy miscellaneous configuration 1a74 h 0e h reserved mac address filtering configuration 0014 0f h filter control register 1 filter control register 0 0000 h 10 h filter control register 3 filter control register 2 0000 h 11 h filter control register 5 filter control register 4 0000 h 12 h filter control register 7 filter control register 6 0000 h 13 h filter control register 9 filter control register 8 0000 h 14 h filter control register 11 filter control register 10 0000 h 15 h filter control register 13 filter control register 12 0000 h 16 h filter control register 15 filter control register 14 0000 h 17 h filter type register 0 0000 h 18 h filter type register 1 0000 h 19 h filter register 0 0000 h 1a h filter register 1 0000 h 1b h filter register 2 0000 h 1c h filter register 3 0000 h 1d h filter register 4 0000 h 1e h filter register 5 0000 h 1f h filter register 6 0000 h 20 h filter register 7 0000 h 21 h filter register 8 0000 h 22 h filter register 9 0000 h data sheet 29 rev. 1.02, 2005-11-25 ninja c/cx adm6992c/cx registers description 23 h filter register 10 0000 h 24 h filter register 11 0000 h 25 h filter register 12 0000 h 26 h filter register 13 0000 h 27 h filter register 14 0000 h 28 h filter register 15 0000 h 29 h pvid and pcid mask of port 0 00001 2a h pvid and pcid mask of port 0 0000 h 2b h pvid and pcid mask of port 1 00001 2c h pvid and pcid mask of port 1 d000 h 2d h tag rule 0 f000 h 2e h tag rule 0 00ff h 2f h tag rule 1 f000 h 30 h tag rule 1 00ff h 31 h tag rule 2 f000 h 32 h tag rule 2 00ff h 33 h tag rule 3 f000 h 34 h tag rule 2 00ff h 35 h oam configuration register 1 0380 h 36 h oam configuration register 2 feff h 37 h vender code[15:0] 0000 h 38 h model number[7:0] vender code[23:16] 0000 h 39 h model number[23:8] 0000 h 3a h forwarding configuration 1 6000 h 3b h forwarding configuration 2 0000 h 3c h default value control register 0000 h table 12 eeprom register map (cont?d) register bit 15-8 bit 7-0 default value ninja c/cx adm6992c/cx registers description data sheet 30 rev. 1.02, 2005-11-25 4.2 eeprom regist er descriptions table 13 registers address spaceregisters address space module base address end address note eeprom 00 h 3c h table 14 registers overview register short name register long name offset address page number sr signature register 00 h 32 pcr_0 port configuration register 0 01 h 33 pcr_1 port configuration register 1 02 h 34 mc_0 miscellaneous configuration 0 03 h 35 mcr_1 miscellaneous configur ation register 1 04 h 35 mcr_2 miscellaneous configur ation register 2 05 h 37 bmc_0 buffer management configuration 0 06 h 38 bmc_1 buffer management configuration 1 07 h 38 bmc_2 buffer management configuration 2 08 h 39 ibw_ccr_0 ingress bandwidth control configuration 0 09 h 39 ebw_ccr_1 egress bandwidth cont rol configuration 1 0a h 39 ibw_ccr_2 ingress bandwidth control configuration 2 0b h 40 ebw_ccr_3 egress bandwidth cont rol configuration 3 0c h 40 phy_mc phy miscellaneous configuration 0d h 41 mac_afc mac address filtering configuration 0e h 42 pcfc_1_0 packet filter control register 1 and 0 0f h 43 pcfc_3_2 packet filter control registers 3 and 2 10 h 43 pcfc_5_4 packet filter control registers 5 and 4 11 h 43 pcfc_7_6 packet filter control registers 7 and 6 12 h 43 pcfc_9_8 packet filter control registers 9 and 8 13 h 43 pcfc_11_10 packet filter control registers 11 and 10 14 h 43 pcfc_13_12 packet filter control registers 13 and 12 15 h 43 pcfc_15_14 packet filter control registers 15 and 14 16 h 43 tftr_0 filter type register 0 17 h 44 tftr_1 filter type register 1 18 h 44 fr_0 filter register 0 19 h 45 fr_1 filter register 1 1a h 45 fr_2 filter register 2 1b h 45 fr_3 filter register 3 1c h 45 fr_4 filter register 4 1d h 45 fr_5 filter register 5 1e h 45 fr_6 filter register 6 1f h 45 fr_7 filter register 7 20 h 45 fr_8 filter register 8 21 h 45 data sheet 31 rev. 1.02, 2005-11-25 ninja c/cx adm6992c/cx registers description the register is addressed wordwise. fr_9 filter register 9 22 h 45 fr_10 filter register 10 23 h 45 fr_11 filter register 11 24 h 45 fr_12 filter register 12 25 h 45 fr_13 filter register 13 26 h 45 fr_14 filter register 14 27 h 45 fr_15 filter register 15 28 h 45 pb_id_0_0 port base vlan id and mask 0 of port 0 29 h 46 pb_id_1_0 port base vlan id and mask 1 of port 0 2a h 46 pb_id_0_1 port base vlan id and mask 0 of port 1 2b h 47 pb_id_1_1 port base vlan id and mask 1 of port 1 2c h 47 tpr_0_0 tag port rule 0 register 0 2d h 48 tpr_1_0 tag port rule 1 register 0 2e h 48 tpr_0_1 tag port rule 0 register 1 2f h 48 tpr_1_1 tag port rule 1 register 1 30 h 49 tpr_0_2 tag port rule 0 register 2 31 h 48 tpr_1_2 tag port rule 1 register 2 32 h 49 tpr_0_3 tag port rule 0 register 3 33 h 48 tpr_1x tag port rule 1 x 34 h 49 oam_c_1 oam configuration register 1 35 h 49 oam_cr_2 oam configuration register 2 36 h 51 mcr_3 miscellaneous configur ation register 3 37 h 51 mcr_4 miscellaneous configuration 4 38 h 52 mcr_5 miscellaneous configur ation register 5 39 h 52 fc_1 forwarding configuration 1 3a h 53 fc_2 forwarding configuration 2 3b h 53 dv_cr default value control register 3c h 54 table 15 register access types mode symbol description hw description sw read/write rw register is used as input for the hw register is readable and writable by sw read r register is written by hw (register between input and output -> one cycle delay) value written by software is ignored by hardware; that is, software may write any value to this field without affecting hardware behavior (= target for development.) read only ro register is set by hw (register between input and output -> one cycle delay) sw can only read this register read virtual rv physically, there is no new register, the input of the signal is connected directly to the address multiplexer. sw can only read this register table 14 registers overview (cont?d) register short name register long name offset address page number ninja c/cx adm6992c/cx registers description data sheet 32 rev. 1.02, 2005-11-25 4.2.1 eeprom register format signature register latch high, self clearing lhsc latches high signal at high level, clear on read sw can read the register latch low, self clearing llsc latches high signal at low-level, clear on read sw can read the register latch high, mask clearing lhmk latches high signal at high level, register cleared with written mask sw can read the register, with write mask the register can be cleared (1 clears) latch low, mask clearing llmk latches high signal at low-level, register cleared on read sw can read the register, with write mask the register can be cleared (1 clears) interrupt high, self clearing ihsc differentiates the input signal (low- >high) register cleared on read sw can read the register interrupt low, self clearing ilsc differentiates the input signal (high- >low) register cleared on read sw can read the register interrupt high, mask clearing ihmk differentiates the input signal (high- >low) register cleared with written mask sw can read the register, with write mask the register can be cleared interrupt low, mask clearing ilmk differentiates the input signal (low- >high) register cleared with written mask sw can read the register, with write mask the register can be cleared interrupt enable register ien enables the interr upt source for interrupt generation sw can read and write this register latch_on_reset lor rw register, value is latched after first clock cycle after reset register is readable and writable by sw read/write self clearing rwsc register is used as input for the hw, the register will be clea red due to a hw mechanism. writing to the register generates a strobe signal for the hw (1 pdi clock cycle) register is readable and writable by sw. table 16 registers clock domains clock short name description sr offset reset value signature register 00 h 4154 h table 15 register access types (cont?d) mode symbol description hw description sw u r 6 l j q d w x u h data sheet 33 rev. 1.02, 2005-11-25 ninja c/cx adm6992c/cx registers description port configuration register 0 field bits type description signature 15:0 ro signature 4154 h sig , default (at) pcr_0 offset reset value port configuration register 0 01 h 104f h field bits type description lbc 15 rw loop-back control 0 b n , normal operation (default) 1 b lp , local loop-back for port1/port0 pac 14 rw packet authorization control 0 b all , all packet (default) 1 b ppp , pppoe only rpt 13 rw receive packet tag recognition control 0 b rec , recognize vlan tag automatically (default) 1 b dis , disable optc 12 rw output packet tagging control 0 b tag , tag/untag packets if needed 1 b bp , bypass tx packets same as rx (default) mac 11:7 rw mac learning table entry limitation 0 b dis , disable total mac limitation (default) 1 b max , maximum allowable total mac anpd 6 rw auto-negotiation parallel detect follow ieee802.3 0 b b , both 1 b h , half only (default) an 5 rw auto-negotiation advertise single capability 0 b e , expand (default) 1 b s , single ana 4 rw auto-negotiation advertisement 0 b fs , follow speed and duplex setting to negotiate with link partner. (default) 1 b 4w , always 4 way auto-negotiation dx 3 rw duplex 0 b hd , half duplex 1 b fd , full duplex (default) u z / % & u z 3 $ & u z 5 3 7 u z 2 3 7 & u z 0 $ & u z $ 1 3 ' u z $ 1 u z $ 1 $ u z ' ; u z 6 3 u z $ 1 ( u z ) & ninja c/cx adm6992c/cx registers description data sheet 34 rev. 1.02, 2005-11-25 port configuration register 1 sp 2 rw speed 0 b 10m , 10m 1 b 100m , 100m (default) ane 1 rw auto negotiation enable 0 b d , disable auto-negotiation 1 b e , enable auto-negotiation. (default) fc 0 rw 802.3x flow control command ability 0 b d , disable 802.3x flow control command ability 1 b e , enable 802.3x flow cont rol command ability (default) pcr_1 offset reset value port configuration register 1 02 h 104f h field bits type description lbc 15 rw loop-back control 0 b n , normal operation (default) 1 b lp , local loop-back for port1/port0 pac 14 rw packet authorization control 0 b all , all packet (default) 1 b ppp , pppoe only rpt 13 rw receive packet tag recognition control 0 b rec , recognize vlan tag automatically (default) 1 b dis , disable optc 12 rw output packet tagging control 0 b tag , tag/untag packets if needed 1 b bp , bypass tx packets same as rx (default) mac 11:7 rw mac learning table entry limitation 0 b dis , disable total mac limitation (default) 1 b max , maximum allowable total mac anpd 6 rw auto-negotiation parallel detect follow ieee802.3 0 b b , both 1 b h , half only (default) an 5 rw auto-negotiation advertise single capability 0 b e , expand (default) 1 b s , single field bits type description u z / % & u z 3 $ & u z 5 3 7 u z 2 3 7 & u z 0 $ & u z $ 1 3 ' u z $ 1 u z $ 1 $ u z ' ; u z 6 3 u z $ 1 ( u z ) & data sheet 35 rev. 1.02, 2005-11-25 ninja c/cx adm6992c/cx registers description miscellaneous configuration 0 miscellaneous configuration register 1 ana 4 rw auto-negotiation advertisement 0 b fs , follow speed and duplex setting to negotiate with link partner. (default) 1 b 4w , always 4 way auto-negotiation dx 3 rw duplex 0 b hd , half duplex 1 b fd , full duplex (default) sp 2 rw speed 0 b 10m , 10m 1 b 100m , 100m (default) ane 1 rw auto negotiation enable 0 b d , disable auto-negotiation 1 b e , enable auto-negotiation. (default) fc 0 rw 802.3x flow control command ability 0 b d , disable 802.3x flow control command ability 1 b e , enable 802.3x flow cont rol command ability (default) mc_0 offset reset value miscellaneous configuration 0 03 h 0600 h field bits type description ecrc 15 rw enable crc check 0 b e , enable (default) 1 b d , disable crs 14 rw crs (carrier sense) check disable checking of the length of crs 0 b ed , enable (default) 1 b dd , disable mps 13:0 rw maximum packet size maximum allowable frame size in bytes 9216 d max , max. bytes number 1536 d def , default value field bits type description u z ( & 5 & u z & 5 6 u z 0 3 6 ninja c/cx adm6992c/cx registers description data sheet 36 rev. 1.02, 2005-11-25 mcr_1 offset reset value miscellaneous configuration register 1 04 h 0000 h field bits type description led_st 15 rw led status definition when utp link down 0 b tbd , always put off leds of ut p port when utp link down (default) 1 b tbd , leds of utp port show dipsw setting when auto-negotiation disabled and linked down led_on 14 rw turn on all led at the same time during led self test 0 b tbd , disable (default) 1 b tbd , enable mac 13 rw mac address table hashing algorithm control 0 b dm , mac address lookup table uses direct mode to generate hash key (default) 1 b crc , mac address lookup table uses crc to generate hash key pfrc 12 rw pause frame recognition control when auto-negotiation disabled 0 b stop , stop transmitting frame if pause frame receiv ed. (default) 1 b nos , don?t stop transmitting frame if pause frame received when flow control capability is disabled. res 11 ro reserved 0 b def , default vlan 10 rw replace vlan id 0 and 1 by pvid 0 b d , disable (default) 1 b r , replace efm_p0 9 rw emulated force mode for port0 0 b d , disable (default) 1 b tbd , pl 8 rw preamble leveling 0 b 7b , 7 bytes (default) 1 b 6b , 6 bytes dbo 7 rw disable back-off 0 b e , enable (default) 1 b d , disable dp 6 rw discard packet after 16th collision 0 b e , disable (default) 1 b d , enable u z / ( ' b 6 7 u z / ( ' b 2 1 u z 0 $ & u z 3 ) 5 & u r 5 h v u z 9 / $ 1 u z ( ) 0 b 3 u z 3 / u z ' % 2 u z ' 3 u z $ ' u r 5 h v data sheet 37 rev. 1.02, 2005-11-25 ninja c/cx adm6992c/cx registers description miscellaneous configuration register2 ad 5 rw aging disable 0 b e , enable aging (default) 1 b d , disable aging res 4:0 ro reserved mcr_2 offset reset value miscellaneous configuration register 2 05 h 0014 h field bits type description pd 15 rw polarity definition change for hardware pin int_n 0 b la , int_n low active (default) 1 b ha , int_n high active ag 14 rw aging 0 b n , normal (default) 1 b f , fast res 13 ro reserved p0_mdi 12 rw polarity definition change for hardware pin p0_mdi 0 b dip , disable inverse polarity of p0_mdi (default) 1 b ip , inverse polarity of p0_mdi xoven 11 rw polarity definition change for hardware pin xoven 0 b dip , disable inverse polarity of xoven (default) 1 b ip , inverse polarity of xoven fcdis 10 rw polarity definition change for hardware pin p0_fcdis and p1_fcdis 0 b dip , disable inverse polarity (default) 1 b ip , inverse polarity rechalf 9 rw polarity definition change for hardware pin p0_rechalf and p1_rechalf 0 b dip , disable inverse polarity (default) 1 b ip , inverse polarity rec10 8 rw polarity definition change for hardware pin p0_rec10 and p1_rec10 0 b dip , disable inverse polarity (default) 1 b ip , inverse polarity field bits type description u z 3 ' u z $ * u r 5 h v u z 3 b 0 ' , u z ; 2 9 ( 1 u z ) & ' , 6 u z 5 ( & + $ / ) u z 5 ( & u z $ 1 ' , 6 u r 5 h v u r 5 h v u z ) 3 & u z & x w u r 5 h v u r 5 h v ninja c/cx adm6992c/cx registers description data sheet 38 rev. 1.02, 2005-11-25 buffer management configuration 0 buffer management configuration 1 andis 7 rw polarity definition change for hardware pin p0_andis and p1_andis 0 b dip , disable inverse polarity (default) 1 b ip , inverse polarity res 6 ro reserved 0 b def , default res 5:4 ro reserved fpc 3 rw fault propagation control 0 b ep , enable fault propagation in converter mode (default) 1 b dp , disable fault propagation cut 2 rw cut-through forwarding control in converter mode 0 b es , enable 100m snooping in converter mode 1 b ds , disable snooping (default) res 1 ro reserved res 0 ro reserved bmc_0 offset reset value buffer management configuration 0 06 h 0198 h field bits type description res 15:0 ro reserved 0198 h def , default bmc_1 offset reset value buffer management configuration 1 07 h 0258 h field bits type description u r 5 h v u r 5 h v data sheet 39 rev. 1.02, 2005-11-25 ninja c/cx adm6992c/cx registers description buffer management configuration 2 ingress bandwidth control configuration 0 egress bandwidth control configuration 1 field bits type description res 15:0 ro reserved 0258 h def , default bmc_2 offset reset value buffer management configuration 2 08 h 0008 h field bits type description res 15:0 ro reserved 0008 h def , default ibw_ccr_0 offset reset value ingress bandwidth control configuration 0 09 h 0000 h field bits type description ibc_p0 15 rw port 0 ingress bandwidth control 0 b d , disable (default) 1 b e , enable ibct_p0 14:0 rw port0 ingress bandwidth control threshold step size: 4 kbytes 0000 h def , default ebw_ccr_1 offset reset value egress bandwidth control configuration 1 0a h 0000 h u r 5 h v u z , % & b 3 u z , % & 7 b 3 ninja c/cx adm6992c/cx registers description data sheet 40 rev. 1.02, 2005-11-25 ingress bandwidth control configuration 2 egress bandwidth control configuration 3 field bits type description ebc_p0 15 rw port 0 egress bandwidth control 0 b d , disable (default) 1 b e , enable ebct_p0 14:0 rw port 0 egress bandwidth control threshold step size: 4 kbytes 0000 h z , default ibw_ccr_2 offset reset value ingress bandwidth control configuration 2 0b h 0000 h field bits type description ibc_p1 15 rw port 1 ingress bandwidth control 0 b d , disable (default) 1 b e , enable ibct_p1 14:0 rw port 1 ingress bandwidth control threshold step size: 4 kbytes 0000 h z , default ebw_ccr_3 offset reset value egress bandwidth control configuration 3 0c h 0000 h u z ( % & b 3 u z ( % & 7 b 3 u z , % & b 3 u z , % & 7 b 3 u z ( % & b 3 u z ( % & 7 b 3 data sheet 41 rev. 1.02, 2005-11-25 ninja c/cx adm6992c/cx registers description phy miscellaneous configuration field bits type description ebc_p1 15 rw port 1 egress bandwidth control 0 b d , disable (default) 1 b e , enable ebct_p1 14:0 rw port 1 egress bandwidth control threshold step size: 4 kbytes 0000 h z , default phy_mc offset reset value phy miscellaneous configuration 0d h 1a74 h field bits type description res 15:0 ro reserved 1a74 h conf , default u r 5 h v ninja c/cx adm6992c/cx registers description data sheet 42 rev. 1.02, 2005-11-25 reserved mac address filtering configuration mac_afc offset reset value mac address filtering configuration 0e h 0014 h field bits type description mfm 15:14 rw match frame mode 00 b sam , crc is correct and the same with crc of la st requested transmitted user frame (default) 01 b cor , crc is correct 10 b dif , crc is incorrect or differen t with crc of last requested transmitted user frame 11 b inc , crc is incorrect tufm 13:12 rw transmit user frame mode 00 b sf , single frame (default) 01 b cmf , continuous transmit until matc h frame found or match timer expired 1x b ct , continuous transmit res 11 ro reserved 0 b def , default crc 10 ro disable oam crc check 0 b e , enable (default) 1 b d , disable res 9:8 ro reserved 00 b def , default pfm_10 7:6 rw packet filtering mode for received da = 01 80 c2 00 00 10 ~ 01 80 c2 00 00 ff 0 b def , default pfm_02 5:4 ro packet filtering mode for received da = 01 80 c2 00 00 02 ~ 01 80 c2 00 00 0f 1 b def , default pfm_01 3:2 rw packet filtering mode for received da = 01 80 c2 00 00 01 and opcode != pause 01 b def , default (fixed) pfm_00 1:0 rw packet filtering mode for received da = 01 80 c2 00 00 00 00 b def , default u z 0 ) 0 u z 7 8 ) 0 u r 5 h v u r & 5 & u r 5 h v u z 3 ) 0 b u r 3 ) 0 b u z 3 ) 0 b u z 3 ) 0 b data sheet 43 rev. 1.02, 2005-11-25 ninja c/cx adm6992c/cx registers description packet filter control registers 1 and 0 other packet filter control registers have the same structure and characteristics as packet filter control registers 1 and 0 ; the offset addresses are listed in table 17 . pcfc_1_0 offset reset value packet filter control register 1 and 0 0f h 0000 h field bits type description res 15 ro reserved ap1_r1 14 ro apply to port 1 rx 1 0 b dna , do not apply 1 b apl , apply ap0_r1 13 ro apply to port 0 rx 1 0 b dna , do not apply 1 b apl , apply opc_1a 12:8 ro op code for filter defined in register 1a h (1c h , 1e h , 20 h , 22 h , 24 h , 26 h , 28 h ) res 7 ro reserved ap1_r1 6 rw apply to port 1 rx 1 0 b dna , do not apply 1 b apl , apply ap1_r1 5 rw apply to port 0 rx 1 0 b dna , do not apply 1 b apl , apply opc_19 4:0 rw op code for filter which defined in register 19 h (1b h , 1d h , 1f h , 21 h , 23 h , 25 h , 27 h ) table 17 other packet filter control regsiters register short name register long name offset address page number pcfc_3_2 packet filter control registers 3 and 2 10 h pcfc_5_4 packet filter control registers 5 and 4 11 h pcfc_7_6 packet filter control registers 7 and 6 12 h pcfc_9_8 packet filter control registers 9 and 8 13 h pcfc_11_10 packet filter control registers 11 and 10 14 h pcfc_13_12 packet filter control registers 13 and 12 15 h pcfc_15_14 packet filter control registers 15 and 14 16 h u r 5 h v u r $ 3 b 5 u r $ 3 b 5 u r 2 3 & b $ u r 5 h v u z $ 3 b 5 u z $ 3 b 5 u z 2 3 & b ninja c/cx adm6992c/cx registers description data sheet 44 rev. 1.02, 2005-11-25 filter type register 0 filter type register 1 tftr_0 offset reset value filter type register 0 17 h 0000 h field bits type description tf_7_15 15:14 rw type of filter 7 tf_6_14 13:12 rw type of filter 6 tf_5_13 11:10 rw type of filter 5 tf_4_12 9:8 rw type of filter 4 tf_3_11 7:6 rw type of filter 3 tf_2_10 5:4 rw type of filter 2 tf_1_9 3:2 rw type of filter 1 tf_0_8 1:0 rw type of filter 0 tftr_1 offset reset value filter type register 1 18 h 0000 h field bits type description tf_7_15 15:14 rw type of filter 15 tf_6_14 13:12 rw type of filter 14 tf_5_13 11:10 rw type of filter 13 tf_4_12 9:8 rw type of filter 12 tf_3_11 7:6 rw type of filter 11 tf_2_10 5:4 rw type of filter 10 tf_1_9 3:2 rw type of filter 9 tf_0_8 1:0 rw type of filter 8 u z 7 ) b b u z 7 ) b b u z 7 ) b b u z 7 ) b b u z 7 ) b b u z 7 ) b b u z 7 ) b b u z 7 ) b b u z 7 ) b b u z 7 ) b b u z 7 ) b b u z 7 ) b b u z 7 ) b b u z 7 ) b b u z 7 ) b b u z 7 ) b b data sheet 45 rev. 1.02, 2005-11-25 ninja c/cx adm6992c/cx registers description filter register 0 other filter registers have the same structure and characteristics as filter register 0 ; the offset addresses are listed in table 18 . fr_0 offset reset value filter register 0 19 h 0000 h field bits type description filter 15:0 rw filter table 18 other filter regsiters register short name register long name offset address page number fr_1 filter register 1 1a h fr_2 filter register 2 1b h fr_3 filter register 3 1c h fr_4 filter register 4 1d h fr_5 filter register 5 1e h fr_6 filter register 6 1f h fr_7 filter register 7 20 h fr_8 filter register 8 21 h fr_9 filter register 9 22 h fr_10 filter register 10 23 h fr_11 filter register 11 24 h fr_12 filter register 12 25 h fr_13 filter register 13 26 h fr_14 filter register 14 27 h fr_15 filter register 15 28 h u z ) l o w h u ninja c/cx adm6992c/cx registers description data sheet 46 rev. 1.02, 2005-11-25 port base vlan id and mask 0 of port 0 port base vlan id and mask 0 of port 1 pb_id_0_0 offset reset value port base vlan id and mask 0 of port 0 29 h 0001 h field bits type description dpri 15:13 rw dpri default priority dcfi 12 rw dcfi default cfi pvid 11:10 rw pvid port base vlan id 01 b def , default pb_id_1_0 offset reset value port base vlan id and mask 1 of port 0 2a h 0000 h field bits type description pvid 15:0 rw pvid mask u z ' 3 5 , u z ' & ) , u z 3 9 , ' 5 h v u z 3 9 , ' data sheet 47 rev. 1.02, 2005-11-25 ninja c/cx adm6992c/cx registers description port base vlan id and mask 0 of port 1 port base vlan id and mask 1 of port 1 pb_id_0_1 offset reset value port base vlan id and mask 0 of port 1 2b h 0001 h field bits type description dpri 15:13 rw dpri default priority dcfi 12 rw dcfi default cfi pvid 11:10 rw pvid port base vlan id 01 b def , default pb_id_1_1 offset reset value port base vlan id and mask 1 of port 1 2c h 0000 h field bits type description pvid 15:0 rw pvid mask u z ' 3 5 , u z ' & ) , u z 3 9 , ' 5 h v u z 3 9 , ' ninja c/cx adm6992c/cx registers description data sheet 48 rev. 1.02, 2005-11-25 tag port rule 0 register 0 other tag port rule 0 registers have the same structure and characteristics as tag port rule 0 register 0 ; the offset addresses are listed in table 19 . tag port rule 1 register 0 tpr_0_0 offset reset value tag port rule 0 register 0 2d h f000 h field bits type description rule_mask 15:12 rw rule mask f h d , default rule 11:0 rw rule table 19 other tag port rule 0 registers register short name register long name offset address page number tpr_0_1 tag port rule 0 register 1 2f h tpr_0_2 tag port rule 0 register 2 31 h tpr_0_3 tag port rule 0 register 3 33 h tpr_1_0 offset reset value tag port rule 1 register 0 2e h 00ff h field bits type description port 11:9 rw port to apply the rule ex 8 rw exclude rule r_mask 7:0 rw rule mask[11:4] u z 5 x o h b 0 d v n u z 5 x o h 5 h v u z 3 r u w u z ( ; u z 5 b 0 d v n data sheet 49 rev. 1.02, 2005-11-25 ninja c/cx adm6992c/cx registers description other tag port rule 1 registers have the same structure and characteristics as tag port rule 1 register 0 ; the offset addresses are listed in table 20 . tag port rule 1 x oam configuration register 1 table 20 other tag port rule 1 regsiters register short name register long name offset address page number tpr_1_1 tag port rule 1 register 1 30 h tpr_1_2 tag port rule 1 register 2 32 h tpr_1x offset reset value tag port rule 1 x 34 h 00ff h field bits type description lbtm 15 rw loop back test mode 0 b tbd , depends on current speed configuration to test 10m or 100m phy (default) 1 b tbd , always test 100m phy timer 14:12 rw timer timer to qualify power failure recovery status (second) 000 b ~111 b , 0~8 seconds 000 b , 0 seconds (default) port 11:9 rw port to apply the rule er 8 rw exclude rule rule_mask 7:0 rw rule mask[11:4] oam_c_1 offset reset value oam configuration register 1 35 h 0380 h u z / % 7 0 u z 7 l p h u u z 3 r u w u z ( 5 u z 5 x o h b 0 d v n u z 7 6 b ' h i u z 7 6 b & u z 3 5 0 7 u z ' & u z 5 & 6 2 u z 5 & 6 ) u z 8 b / 8 u z 8 b / ' u z 7 ; ) u z 6 1 ) & u z 0 & ninja c/cx adm6992c/cx registers description data sheet 50 rev. 1.02, 2005-11-25 field bits type description ts_def 15:12 rw ts-1000 oam c field bit[4:7] definition for remote control 0000 b z , default ts_c 11 rw ts-1000 oam c field bit[1] check 0 b cd , check direction of oam frame (default) 1 b nc , do not check direction of oam frame prmt 10:8 rw ninja c/cx (adm6992c/cx) power recovery mask timer when power-on-initial timer for mask oam after power up and port 1 link up (second) 000 b ~111 b , 0~8 seconds 011 b , 3 seconds (default) dc 7 rw ninja c/cx (adm6992c/cx) power detection control 0 b z , should be set 1 b tbd , rcso 6 rw ninja c/cx (adm6992c/cx) oa m remote control stop oam enable 0 b e , enable remote control oam (default) 1 b d , disable remote control oam rcsf 5 rw ninja c/cx (adm6992c/cx) oam remote control start function enable 0 b d , disable remote control (default) 1 b e , enable remote control u_lu 4 rw ts-1000 oam s field bit[7:10] definition when utp link up 0 b show , s7-s8 and s9 of oam frame show phy status if phy link up (default) 1 b not , s7-s8 and s9 of oam frame don?t show phy status if phy link up u_ld 3 rw ts-1000 oam s field bit[7:10] definition when auto-negotiation enable and utp link down 0 b dis , disable idiot setting. ninja c/cx (adm6992c/cx) will send dipsw setting to co when utp port auto-negotiation enable and link down (default) 1 b eis , enable idiot setting. ninja c/cx (adm6992c/cx) will always send 10mh to co when utp port auto-negotiation enable and link down txf 2 rw transmit mc_failure when load eeprom fail 0 b tbd , assert mc_failure when load eeprom fail (default) 1 b tbd , don?t assert mc_failu re when load eepom fail snfc 1 rw ntt ts-1000 status notification frame control 0 b tbd , transmit one oam frame if stat e changes or state notification request frame is received. (default) 1 b tbd , transmit three oam frames if state changes or state notification request frame is received. mc 0 rw ntt ts-1000 mc mode control 0 b tbd , cpe mode (default) 1 b tbd , co mode data sheet 51 rev. 1.02, 2005-11-25 ninja c/cx adm6992c/cx registers description oam configuration register 2 ninja c/cx (adm6992c/cx) oam c field bi t[8:15] definition for remote control miscellaneous configuration register 3 vender id oam_cr_2 offset reset value oam configuration register 2 36 h feff h field bits type description rc_ef 15:8 rw remote control end function oam c field bit[8:15] definition fe h ef , default rc_sf 7:0 rw remote control start function oam c field bit[8:15] definition ff h sf , default mcr_3 offset reset value miscellaneous configuration register 3 37 h 0000 h field bits type description vender_id 15:0 rw ntt ts-1000 oam m field bit[15:0] definition vender id bits u z 5 & b ( ) u z 5 & b 6 ) u z 9 h q g h u b , ' ninja c/cx adm6992c/cx registers description data sheet 52 rev. 1.02, 2005-11-25 miscellaneous configuration register 4 miscellaneous configuration register 5 mcr_4 offset reset value miscellaneous configuration 4 38 h 0000 h field bits type description mn_7_0 15:8 rw ntt ts-1000 oam m field bit[31:24] definition model number bit [7:0] vid_23_16 7:0 rw ntt ts-1000 oam m field bit[23:16] definition vender id bit [23:16] mcr_5 offset reset value miscellaneous configuration register 5 39 h 0000 h field bits type description mn_23_8 15:0 rw ntt ts-1000 oam m field bit[47:32] definition model number bits [23:8] u z 0 1 b b u z 9 , ' b b u z 0 1 b b data sheet 53 rev. 1.02, 2005-11-25 ninja c/cx adm6992c/cx registers description forwarding configuration 1 forwarding configuration 2 fc_1 offset reset value forwarding configuration 1 3a h 6000 h field bits type description res 15:4 ro reserved 600 h d , default fm_c 3:2 rw forwarding mode control 00 b sf , store & forward (default) 01 b mct , modify cut-through 10 b r , reserved 11 b mii , mii cut-through res 1 ro reserved 0 b , default fc 0 rw forwarding mode auto-change control 0 b fix , fix forwarding mode (default) 1 b a , automatically change forwarding mode fc_2 offset reset value forwarding configuration 2 3b h 0000 h field bits type description res 15:0 ro reserved 0000 h z , default u r 5 h v u z ) 0 b & u r 5 h v u z ) & u r 5 h v ninja c/cx adm6992c/cx registers description data sheet 54 rev. 1.02, 2005-11-25 default value control register dv_cr offset reset value default value control register 3c h 0000 h field bits type description pu_m 15 rw power up mask mode 0 b tbd , by timer defined in eeprom register 35 h bit[10:8] (default) 1 b tbd , by led self test ps_d 14 rw power status detect mode 0 b tbd , mode 0 (default) 1 b tbd , mode 1 ps_c 13 rw power status change mask timer 0 b tbd , the same with power up mask timer which defined in eeprom register 35 h bit[10:8] (default) 1 b tbd , eeprom register 34 h bit [14:12] pm_t 12 rw power mask timer time base before first oam was sent 0 b tbd , 1 sec. (default) 1 b tbd , 0.5 sec. ipg 11 rw place ipg 0 b tbd , place ipg before and after oam frame and loop back test frame (default) 1 b tbd , place ipg/2 before and after oam frame and loop back test frame ip_d 10 rw inverse polarity of a_pd_detect 0 b tbd , disable inverse the polarity (default) 1 b tbd , inverse the polarity ip_f 9 rw inverse polarity of mc_failure 0 b tbd , disable inverse the polarity (default) 1 b tbd , inverse the polarity bp 8 rw polarity definition change for power-on-setting pin bypass_pause 0 b tbd , disable inverse the def ault value (default) 1 b tbd , inverse the default value eo 7 rw polarity definition change for power-on-setting pin en_oam 0 b tbd , disable inverse the def ault value (default) 1 b tbd , inverse the default value dl 6 rw polarity definition change fo r power-on-setting pin dis_learn 0 b tbd , disable inverse the default value of dis_learn (default) 1 b tbd , inverse the default value of dis_learn u z 3 8 b 0 u z 3 6 b ' u z 3 6 b & u z 3 0 b 7 u z , 3 * u z , 3 b ' u z , 3 b ) u z % 3 u z ( 2 u z ' / u z ) ; u z ) ; b u z / ( ' b u z / ( ' b u z / ( ' b u z ' , 6 data sheet 55 rev. 1.02, 2005-11-25 ninja c/cx adm6992c/cx registers description 4.3 serial manage ment registers fx1 5 rw polarity definition change fo r power-on-setting pin fxmode[1] 0 b tbd , disable inverse the def ault value (default) 1 b tbd , inverse the default value fx_0 4 rw polarity definition change fo r power-on-setting pin fxmode[0] 0 b tbd , disable inverse the def ault value (default) 1 b tbd , inverse the default value led_2 3 rw polarity definition change fo r power-on-setting pin ledmode[2] 0 b tbd , disable inverse the def ault value (default) 1 b tbd , inverse the default value led_1 2 rw polarity definition change fo r power-on-setting pin ledmode[1] 0 b tbd , disable inverse the def ault value (default) 1 b tbd , inverse the default value led_0 1 rw polarity definition change fo r power-on-setting pin ledmode[0] 0 b tbd , disable inverse the def ault value (default) 1 b tbd , inverse the default value dis 0 rw polarity definition change fo r power-on-setting pin disbp_n 0 b tbd , disable inverse the def ault value (default) 1 b tbd , inverse the default value table 21 serial management register map register bit 31-0 default value 00 h chip identify 0002 1090 h 01 h over flow flag 0000 0000 h 02 h p0 receive packets 0000 0000 h 03 h p0 receive byte count 0000 0000 h 04 h p0 transmit packets 0000 0000 h 05 h p0 transmit byte count 0000 0000 h 06 h p0 error count 0000 0000 h 07 h p0 collision count 0000 0000 h 08 h p1 receive packets 0000 0000 h 09 h p1 receive byte count 0000 0000 h 0a h p1 transmit packets 0000 0000 h 0b h p1 transmit byte count 0000 0000 h 0c h p1 error count 0000 0000 h 0d h p1 collision count 0000 0000 h 0e h per port counter reset 0000 0000 h 0f h hardware settings pin 10 h interrupt register 0000 0000 h 11 h interrupt mask register 0000 0000 h 12 h port status real time status 13 h eeprom register f ile access control 0000 4154 h field bits type description ninja c/cx adm6992c/cx registers description data sheet 56 rev. 1.02, 2005-11-25 14 h oam control register 0000 0000 h 15 h source address of loop back test user frame 0 0000 0000 h 16 h source address of loop back test user frame 1 0000 0000 h 17 h transmit oam frame register 0 0000 0000 h 18 h transmit oam frame register 1 0000 0000 h 19 h transmit oam frame register 2 0000 0000 h 1a h received oam frame register 0 0000 0000 h 1b h received oam frame register 1 0000 0000 h 1c h received oam frame register 2 0000 0000 h 1d h oam frame status register 0000 0000 h table 21 serial management register map (cont?d) register bit 31-0 default value data sheet 57 rev. 1.02, 2005-11-25 ninja c/cx adm6992c/cx registers description 4.4 serial management register descriptions the register is addressed wordwise. table 22 registers address space module base address end address note serial 00 h 1d h table 23 registers overview register short name register long name offset address page number chip_id chip identifier 00 h 58 ofr overflow flag register 01 h 59 pcnr_0 port 0 counter register 02 h 60 p0rbc p0 receive byte count 03 h 60 p0tp p0 transmit packets 04 h 60 p0tbc p0 transmit byte count 05 h 60 p0ec p0 error count 06 h 60 p0cc p0 collision count 07 h 60 p1rp p1 receive packets 08 h 60 p1rbc p1 receive byte count 09 h 60 p1tp p1 transmit packets 0a h 60 p1tbc p1 transmit byte count 0b h 60 p1ec p1 error count 0c h 60 p1cc p1 collision count 0d h 60 pcrr port counter reset register 0e h 60 hw_ssr hardware setting status register 0f h 62 int interrupt register 10 h 63 int_m interrupt mask register 11 h 64 psr port status register 12 h 66 ee_rfac eeprom register file access control 13 h 67 oam_cr oam control register 14 h 68 sa_f_0 source address of loop back test user frame 0 15 h 69 sa_f_1 source address of loop back test user frame 1 16 h 70 tfr_0 transmit oam frame register 0 17 h 70 tfr_1 transmit oam frame register 1 18 h 70 tfr_2 transmit oam frame register 2 19 h 71 rfr_0 received oam frame register 0 1a h 72 rfr_1 received oam frame register 1 1b h 72 rfr_2 received oam frame register 0 1c h 73 oam_fsr oam frame status register 1d h 73 ninja c/cx adm6992c/cx registers description data sheet 58 rev. 1.02, 2005-11-25 4.4.1 serail manageme nt register format chip identifier table 24 register access types mode symbol description hw description sw read/write rw register is used as input for the hw register is readable and writable by sw read r register is written by hw (register between input and output -> one cycle delay) value written by software is ignored by hardware; that is, software may write any value to this field without affecting hardware behavior (= target for development.) read only ro register is set by hw (register between input and output -> one cycle delay) sw can only read this register read virtual rv physically, there is no new register, the input of the signal is connected directly to the address multiplexer. sw can only read this register latch high, self clearing lhsc latches high signal at high level, clear on read sw can read the register latch low, self clearing llsc latches high signal at low-level, clear on read sw can read the register latch high, mask clearing lhmk latches high signal at high level, register cleared with written mask sw can read the register, with write mask the register can be cleared (1 clears) latch low, mask clearing llmk latches high signal at low-level, register cleared on read sw can read the register, with write mask the register can be cleared (1 clears) interrupt high, self clearing ihsc differentiates the input signal (low- >high) register cleared on read sw can read the register interrupt low, self clearing ilsc differentiates the input signal (high- >low) register cleared on read sw can read the register interrupt high, mask clearing ihmk differentiate the in put signal (high- >low) register cleared with written mask sw can read the register, with write mask the register can be cleared interrupt low, mask clearing ilmk differentiates the input signal (low- >high) register cleared with written mask sw can read the register, with write mask the register can be cleared interrupt enable register ien enables the interr upt source for interrupt generation sw can read and write this register latch_on_reset lor rw register, value is latched after first clock cycle after reset register is readable and writable by sw read/write self clearing rwsc register is used as input for the hw, the register will be clea red due to a hw mechanism. writing to the register generates a strobe signal for the hw (1 pdi clock cycle) register is readable and writable by sw. table 25 registers clock domainsregisters clock domains clock short name description data sheet 59 rev. 1.02, 2005-11-25 ninja c/cx adm6992c/cx registers description overflow flag register chip_id offset reset value chip identifier 00 h 0002 1090 h field bits type description p_code 31:4 ro project code r_code 3:0 ro revision code ofr offset reset value overflow flag register 01 h 0000 0000 h field bits type description p1cc 11 lhsc p1 collision count 1 b tbd , overflow p1ec 10 lhsc p1 error count overflow 1 b tbd , overflow p1tc 9 lhsc p1 transmit byte count overflow 1 b tbd , overflow p1tp 8 lhsc p1 transmit packets overflow 1 b tbd , overflow p1rc 7 lhsc p1 receive byte count overflow 1 b tbd , overflow p1rp 6 lhsc p1 receive packets overflow 1 b tbd , overflow p0cc 5 lhsc p0 collision count overflow 1 b tbd , overflow p0ec 4 lhsc p0 error count overflow 1 b tbd , overflow p0tc 3 lhsc p0 transmit byte count overflow 1 b tbd , overflow u r 3 b & r g h u r 5 b & r g h 5 h v o k v f 3 & & o k v f 3 ( & o k v f 3 7 & o k v f 3 7 3 o k v f 3 5 & o k v f 3 5 3 o k v f 3 & & o k v f 3 ( & o k v f 3 7 & o k v f 3 7 3 o k v f 3 5 & o k v f 3 5 3 ninja c/cx adm6992c/cx registers description data sheet 60 rev. 1.02, 2005-11-25 port 0 counter register other counter registers have the same structure and characteristics as port 0 counter register ; the names and offset addresses are listed in table 26 . port counter reset register p0tp 2 lhsc p0 transmit packets overflow 1 b tbd , overflow p0rc 1 lhsc p0 receive byte count overflow 1 b tbd , overflow p0rp 0 lhsc p0 receive packets overflow 1 b tbd , overflow pcnr_0 offset reset value port 0 counter register 02 h 0000 0000 h field bits type description counter 31:0 rw counter table 26 other counter registers register short name register long name offset address page number p0rbc p0 receive byte count 03 h p0tp p0 transmit packets 04 h p0tbc p0 transmit byte count 05 h p0ec p0 error count 06 h p0cc p0 collision count 07 h p1rp p1 receive packets 08 h p1rbc p1 receive byte count 09 h p1tp p1 transmit packets 0a h p1tbc p1 transmit byte count 0b h p1ec p1 error count 0c h p1cc p1 collision count 0d h field bits type description u z & r x q w h u data sheet 61 rev. 1.02, 2005-11-25 ninja c/cx adm6992c/cx registers description pcrr offset reset value port counter reset register 0e h 0000 0000 h field bits type description rp1 1 rw reset all counter of port 1 1 b rp1 , reset rp0 0 rw reset all counter of port 0 1 b rp0 , reset 5 h v u z 5 3 u z 5 3 ninja c/cx adm6992c/cx registers description data sheet 62 rev. 1.02, 2005-11-25 hardware setting status register hw_ssr offset reset value hardware setting status register 0f h pin h field bits type description bod 24 ro bonding option: disoam bob 23 ro bonding option: bond128 id 22:20 ro chip id[2:0] dbp 19 ro disable back pressure lm 18:16 ro led mode[2:0] fm 15:14 ro fiber mode[1:0] dal 13 ro disable mac a ddress learning ee 12 ro enable oam engine bp 11 ro bypass reserved mac address filtering dl 10 ro disable link pass through p0 9 ro p0 mdi/mdix ea 8 ro enable auto-crossover df 7:6 ro disable flow control[1:0] ana 5:4 ro recommend auto-negotiation ability for tp port[1:0] s 3:2 ro recommend speed 10 for tp port[1:0] dh 1:0 ro recommend duplex half for tp/fx port[1:0] 5 h v u r % 2 ' u r % 2 % u r , ' u r ' % 3 u r / 0 u r ) 0 u r ' $ / u r ( ( u r % 3 u r ' / u r 3 u r ( $ u r ' ) u r $ 1 $ u r 6 u r ' + data sheet 63 rev. 1.02, 2005-11-25 ninja c/cx adm6992c/cx registers description interrupt register int offset reset value interrupt register 10 h 0000 0000 h field bits type description fmc 15 lhsc forwarding mode change mtd 14 lhsc match timer done mff 13 lhsc match frame found ruf 12 lhsc request user frame transmitted. rof 11 lhsc request oam frame transmitted. uvo 10 lhsc unknown valid oam frame received kvo 9 lhsc known valid oam frame received co 8 lhsc counter overflow( 0 b tbd , normal 1 b tbd , any counter defined in register 0x02~0x0e overflow p1f 7 lhsc port 1 flow control ability change 0 b n , normal 1 b sc , status change p1d 6 lhsc port 1 duplex change( 0 b n , normal 1 b sc , status change p1s 5 lhsc port 1 speed change( 0 b n , normal 1 b sc , status change p1l 4 lhsc port 1 link status change 0 b n , normal 1 b sc , status change p0f 3 lhsc port 0 flow control ability change 0 b n , normal 1 b sc , status change) p0d 2 lhsc port 0 duplex change 0 b n , normal 1 b sc , status change p0s 1 lhsc port 0 speed change 0 b n , normal 1 b sc , status change 5 h v o k v f ) 0 & o k v f 0 7 ' o k v f 0 ) ) o k v f 5 8 ) o k v f 5 2 ) o k v f 8 9 2 o k v f . 9 2 o k v f & 2 o k v f 3 ) o k v f 3 ' o k v f 3 6 o k v f 3 / o k v f 3 ) o k v f 3 ' o k v f 3 6 o k v f 3 / ninja c/cx adm6992c/cx registers description data sheet 64 rev. 1.02, 2005-11-25 interrupt mask register p0l 0 lhsc port 0 link status change 0 b n , normal 1 b sc , status change int_m offset reset value interrupt mask register 11 h 0000 0000 h field bits type description fmc 15 rw forwarding mode change 0 b d , disable 1 b e , enable mtd 14 rw match timer done 0 b d , disable 1 b e , enable mfcf 13 rw match frame found 0 b d , disable 1 b e , enable ruf 12 rw request user frame transmitted. 0 b d , disable 1 b e , enable rof 11 rw request oam frame transmitted. 0 b d , disable 1 b e , enable uvo 10 rw unknown valid oam frame received 0 b d , disable 1 b e , enable kvo 9 rw known valid oam frame received 0 b d , disable 1 b e , enable co 8 rw counter overflow 0 b d , disable 1 b e , enable p1f 7 rw port 1 flow control ability change 0 b d , disable 1 b e , enable field bits type description 5 h v u z ) 0 & u z 0 7 ' u z 0 ) & ) u z 5 8 ) u z 5 2 ) u z 8 9 2 u z . 9 2 u z & 2 u z 3 ) u z 3 ' u z 3 6 u z 3 / u z 3 ) u z 3 ' u z 3 6 u z 3 / data sheet 65 rev. 1.02, 2005-11-25 ninja c/cx adm6992c/cx registers description p1d 6 rw port 1 duplex change 0 b d , disable 1 b e , enable p1s 5 rw port 1 speed change 0 b d , disable 1 b e , enable p1l 4 rw port 1 link status change 0 b d , disable 1 b e , enable p0f 3 rw port 0 flow control ability change 0 b d , disable 1 b e , enable p0d 2 rw port 0 duplex change 0 b d , disable 1 b e , enable p0s 1 rw port 0 speed change 0 b d , disable 1 b e , enable p0l 0 rw port 0 link status change 0 b d , disable 1 b e , enable field bits type description ninja c/cx adm6992c/cx registers description data sheet 66 rev. 1.02, 2005-11-25 port status register psr offset reset value port status register 12 h real time status h field bits type description l1 15:14 ro cbbrk_length of p1 00 b l1 , 0~60m 01 b l2 , 60~90m 10 b l3 , 90~130m 11 b l4 , 130~170m brk1 13 ro cbbrk of p1 0 b n , normal 1 b cb , cable broken l0 12:11 ro cbbrk_length of p0 00 b l1 , 0~60m 01 b l2 , 60~90m 10 b l3 , 90~130m 11 b l4 , 130~170m brk0 10 ro cbbrk of p0 0 b n , normal 1 b cb , cable broken bfs1 9 ro buffer full status of port 1 0 b n , normal 1 b bf , buffer full bfs0 8 ro buffer full status of port 0 0 b n , normal 1 b bf , buffer full fc1 7 ro flow control of port 1 0 b d , disable 1 b e , enable dx1 6 ro duplex of port 1 0 b hd , half duplex 1 b fd , full duplex s1 5 ro speed of port 1 0 b 10m , 10m 1 b 100m , 100m ls1 4 ro link status of port 1 0 b ld , link down 1 b lu , link up 5 h v u r / u r % 5 . u r / u r % 5 . u r % ) 6 u r % ) 6 u r ) & u r ' ; u r 6 u r / 6 u r ) & u r ' ; u r 6 u r / 6 data sheet 67 rev. 1.02, 2005-11-25 ninja c/cx adm6992c/cx registers description eeprom register file access control fc0 3 ro flow control of port 0 0 b d , disable 1 b e , enable dx0 2 ro duplex of port 0 0 b hd , half duplex 1 b fd , full duplex s0 1 ro speed of port 0 0 b 10m , 10m 1 b 100m , 100m ls0 0 ro link status of port 0 0 b ld , link down 1 b lu , link up ee_rfac offset reset value eeprom register file access control 13 h 0000 4154 h field bits type description cmd 31:29 rw command 000 b r , read 001 b w , write others b res , reserved res 28:22 rw reserved 0000000 b res , reserved add 21:16 rw address 00 h to 3f h data 15:0 rw data field bits type description u z & 0 ' u z 5 h v u z $ ' ' u z ' $ 7 $ ninja c/cx adm6992c/cx registers description data sheet 68 rev. 1.02, 2005-11-25 oam control register oam_cr offset reset value oam control register 14 h 0000 0000 h field bits type description fck 12 rw oam fifo control for ntt ts-1000 frame 0 b sk , store known oam frame to fifo (default) 1 b n , do not store fcu 11 rw oam fifo control for unknown frame 0 b su , store unknown oam frame to fifo (default) 1 b n , do not store lb 10 rw loop back test user frame transmit control 0 b n , normal (default) 1 b req , request to transmit an user frame which the sa is defined in smi register 15 h and 16 h . after the requested user frame is transmitted, this bit is cleared. tc 9 rw oam frame transmit control 0 b n , normal (default) 1 b req , request to transmit an oam frame which is defined in smi register 17 h , 18 h and 19 h . after the requested oam frame is transmitted, this bit is cleared. lb_hc 8:5 rw loop back test user frame handling control 0000 b d , disable (default) > 0000 b n , find the first valid received ethernet frame with its crc is the same with the most recently transmitted ethernet frame during nnnn*10ms after the frame is found or the timer count done, the register will be cleared. and the se arch result will be stored to register 1d h bit [1:0]. tc 4 rw discard all ethernet frame from fx control 0 b n , normal (default) 1 b de , discard all ethernet frames received from port1 bt 3 rw block the traffic from tp to fx control 0 b n , normal (default) 1 b bt , block the traffic from port0 to port1 eam 2 rw enable auto m field ntt ts-1000 oam vendor id/model number by embedded oam engine 0 b e , enable (default) 1 b d , disable 5 h v u z ) & . u z ) & 8 u z / % u z 7 & u z / % b + & u z 7 & u z % 7 u z ( $ 0 u z ( $ & u z ( . 2 data sheet 69 rev. 1.02, 2005-11-25 ninja c/cx adm6992c/cx registers description source address of loop back test user frame 0 eac 1 rw enable auto crc ntt ts-1000 oam crc by embedded oam engine 0 b e , enable (default) 1 b d , disable eko 0 rw enable known oam frame handling ntt ts-1000 oam frame by embedded oam engine 0 b e , enable(default) 1 b d , disable sa_f_0 offset reset value source address of loop back test user frame 0 15 h 0000 0000 h field bits type description address 31:0 rw source address field bits type description u z $ g g u h v v ninja c/cx adm6992c/cx registers description data sheet 70 rev. 1.02, 2005-11-25 source address of loop back test user frame 1 transmit oam frame register 0 transmit oam frame register 1 sa_f_1 offset reset value source address of loop back test user frame 1 16 h 0000 0000 h field bits type description byte_count 26:16 rw total byte count of payload valid ethernet frame: 46 byte ~ 1500 byte source_add 15:0 rw source address sa[47:32] tfr_0 offset reset value transmit oam frame register 0 17 h 0000 0000 h field bits type description s_field 31:16 rw s field of oam frame c_field 15:0 rw c field of oam frame tfr_1 offset reset value transmit oam frame register 1 18 h 0000 0000 h 5 h v u z % \ w h b & r x q w u z 6 r x u f h b $ g g u z 6 b ) l h o g u z & b ) l h o g u z 0 b ) l h o g data sheet 71 rev. 1.02, 2005-11-25 ninja c/cx adm6992c/cx registers description transmit oam frame register 2 field bits type description m_field 31:0 rw m field bit [31:0] of oam frame tfr_2 offset reset value transmit oam frame register 2 19 h 0000 0000 h field bits type description crc_field 23:16 rw crc field of oam frame m_field 15:0 rw m field bit [47:32] of oam frame 5 h v u z & 5 & b ) l h o g u z 0 b ) l h o g ninja c/cx adm6992c/cx registers description data sheet 72 rev. 1.02, 2005-11-25 received oam frame register 0 received oam frame register 1 rfr_0 offset reset value received oam frame register 0 1a h 0000 0000 h field bits type description s_field 31:16 rw s field of received oam frame c_field 15:0 rw c field of received oam frame rfr_1 offset reset value received oam frame register 1 1b h 0000 0000 h field bits type description m_field 31:16 rw m field bit [31:0] of received oam frame u z 6 b ) l h o g u z & b ) l h o g u z 0 b ) l h o g 5 h v data sheet 73 rev. 1.02, 2005-11-25 ninja c/cx adm6992c/cx registers description received oam frame register 2 oam frame status register rfr_2 offset reset value received oam frame register 0 1c h 0000 0000 h field bits type description crc_field 23:16 rw crc field of received oam frame m_field 15:0 rw m field bit [47:32] of received oam frame oam_fsr offset reset value oam frame status register 1d h 0000 0000 h field bits type description crc 10 rw bad crc oam received 0 b nb , no bad crc oam received 1 b b , bad crc oam received fifo 9:6 rw embedded oam fifo utilization 0000 b e , fifo empty 1000 b 25 , 25% 1100 b 50 , 50% 1110 b 75 , 75% 1111 b f , fifo full tex 5 rw status of loop back test timer 0 b not , timer does not expire before a matched frame is found 1 b yes , timer expires before a matched frame found fr 4 rw status of loop back test user frame 0 b nf , matched frame is not found 1 b f , matched frame is found ruf 3 rw request user frame transmitted rof 2 rw request oam frame transmitted 5 h v u z & 5 & b ) l h o g u z 0 b ) l h o g 5 h v u z & 5 & u z ) , ) 2 u z 7 ( ; u z ) 5 u z 5 8 ) u z 5 2 ) u z 8 ) u z . ) ninja c/cx adm6992c/cx registers description data sheet 74 rev. 1.02, 2005-11-25 uf 1 rw unknown valid oam frame received kf 0 rw known valid oam frame received field bits type description data sheet 75 rev. 1.02, 2005-11-25 ninja c/cx adm6992c/cx electrical specification 5 electrical specification dc and ac. 5.1 dc characterization 5.2 ac characterization power on reset timing, eeprom in terface timing, and smi timing. table 27 electrical absolute maximum rating parameter symbol values unit note / test condition min. typ. max. power supply v cc -0.3 3.6 v input voltage v in -0.3 v cc + 0.3 v output voltage vout -0.3 v cc + 0.3 v storage temperature tstg -55 155 c power dissipation pd 990 mw esd rating esd 2 kv table 28 recommended operating conditions parameter symbol values unit note / test condition min. typ. max. power supply 1) 1) vcc3o. vccbias vcc 3.135 3.3 3.465 v core power supply 2) 2) vccik. vcca2. vccpll vcore 1.71 1.8 1.89 input voltage vin 0 - vcc v junction operating temperature tj 0 25 115 c table 29 dc electrical characteristics for 3.3 v operation 1) 1) under vcc = 3.0 v~ 3.6 v, tj = c ~ 115 c parameter symbol values unit note / test condition min. typ. max. input low voltage vil 0.8 v ttl input high voltage vih 2.0 v ttl output low voltage vol 0.4 v ttl output high voltage voh 2.4 v ttl input pull_up/down resistance ri 50 k ? vil = 0 v or vih = vcc ninja c/cx adm6992c/cx electrical specification data sheet 76 rev. 1.02, 2005-11-25 power on reset timing figure 5 power on reset timing eeprom interface timing figure 6 eeprom interface timing table 30 power on reset timing parameter symbol values unit note / test condition min. typ. max. rst low period t rst 100 ms ttl start of idle pulse width t conf 100 ns ttl table 31 eeprom interface timing parameter symbol values unit note / test condition min. typ. max. eesk period t esk 5120 ns eesk low period t eskl 2550 2570 ns eesk high period t eskh 2550 2570 ns eedi to eesk rising setup time t erds 10 ns data sheet 77 rev. 1.02, 2005-11-25 ninja c/cx adm6992c/cx electrical specification smi timing figure 7smi timing eedi to eesk rising hold time t erdh 10 ns eesk falling to eedo output delay time t ewdd 20 ns table 32 smi timing parameter symbol values unit note / test condition min. typ. max. sdc period t ck 20 ns sdc low period t ckl 10 ns sdc high period t ckh 10 ns sdio to sdc rising setup time on read/write cycle t sds 4 ns sdio to sdc rising hold time on read/write cycle t sdh 2 ns table 31 eeprom interface timing (cont?d) parameter symbol values unit note / test condition min. typ. max. ninja c/cx adm6992c/cx packaging data sheet 78 rev. 1.02, 2005-11-25 6 packaging 64 lqfp packaging for ninjac (adm6992-c) figure 8 64 pin lqfp outside dimension data sheet 79 rev. 1.02, 2005-11-25 ninja c/cx adm6992c/cx packaging note: 1. dimensions d1 and e1 do not include mold protrusion . allowable protrusion is 0.25mm per side. d1 and e1 are maximum plastic body size dime nsions including mold mismatch. 2. dimensions b does not include dambar protrusion. allowable dambar protrusion shall not cause the lead width to exceed the maximum b dimension by more than 0.08m m. dambar can not be located on the lower radius or the foot. minimum space between protrusion and an adjacent lead is 0.07mm for 0.4mm and 0.5mm pitch packages. 3. dimension of 44l ?b? different with jedec spec .(ase: 0.22/0.30/0.38)(je dec: 0.30/0 .37/0.45). table 33 dimensions for 64 pin lqfp outside dimension symbol millimeter (mm) inch min . typ. max. min. typ. max. a ? ? 1.60 ? ? 0.063 a 1 0.05 ? 0.15 0.002 ? 0.006 a 2 1.35 1.40 1.45 0.053 0.055 0.057 d 12.00 bsc. 0.472 bsc. d 1 10.00 bsc 0.393 bsc. e 12.00 bsc 0.472 bsc. e 1 10.00 bsc 0.393 bsc. r 2 0.08 ? 0.20 0.003 ? 0.008 r 1 0.08 ? ? 0.003 ? ? 0 3.5 7 0 3.5 7 1 0 ? ? 0 ? ? 2 11 12 13 11 12 13 3 11 12 13 11 12 13 c 0.09 ? 0.20 0.004 ? 0.008 l 0.45 0.60 0.75 0.018 0.024 0.030 l 1 1.00 ref. 0.039 ref. s 0.20 ? ? 0.008 ? ? 64l b 0.17 0.20 0.27 0.007 0.008 0.011 e 0.50 bsc. 0.020 bsc. d 2 7.50 0.295 e 2 7.50 0.295 tolerance of form and position aaa 0.20 0.008 bbb 0.20 0.008 ccc 0.08 0.003 ddd 0.08 0.003 ninja c/cx adm6992c/cx references data sheet 80 rev. 1.02, 2005-11-25 references [1] [2] [3] [4] [5] [6] data sheet 81 rev. 1.02, 2005-11-25 ninja c/cx adm6992c/cx terminology terminology a b published by infineon technologies ag www.infineon.com |
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